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a="71305038" X-IronPort-AV: E=Sophos;i="6.21,150,1763452800"; d="scan'208";a="71305038" X-CSE-ConnectionGUID: 2dm1dxN7QO2Ci1mK4SW7LQ== X-CSE-MsgGUID: WXETWwMURl29Via+BeFcdg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,150,1763452800"; d="scan'208";a="197408838" From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, skolothumtho@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Yi Sun , Zhenzhong Duan Subject: [PATCH v9 14/19] intel_iommu_accel: Propagate PASID-based iotlb invalidation to host Date: Mon, 15 Dec 2025 01:50:38 -0500 Message-ID: <20251215065046.86991-15-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20251215065046.86991-1-zhenzhong.duan@intel.com> References: <20251215065046.86991-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.15; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1765781603311158500 Content-Type: text/plain; charset="utf-8" From: Yi Liu This traps the guest PASID-based iotlb invalidation request and propagate it to host. Intel VT-d 3.0 supports nested translation in PASID granularity. Guest SVA support could be implemented by configuring nested translation on specific pasid. This is also known as dual stage DMA translation. Under such configuration, guest owns the GVA->GPA translation which is configured as first stage page table on host side for a specific pasid, and host owns GPA->HPA translation. As guest owns first stage translation table, piotlb invalidation should be propagated to host since host IOMMU will cache first level page table related mappings during DMA address translation. Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger --- hw/i386/intel_iommu_accel.h | 10 +++++ hw/i386/intel_iommu_internal.h | 6 +++ hw/i386/intel_iommu.c | 11 ++++-- hw/i386/intel_iommu_accel.c | 69 ++++++++++++++++++++++++++++++++++ 4 files changed, 93 insertions(+), 3 deletions(-) diff --git a/hw/i386/intel_iommu_accel.h b/hw/i386/intel_iommu_accel.h index 82821ec0ef..3b0ecc7e22 100644 --- a/hw/i386/intel_iommu_accel.h +++ b/hw/i386/intel_iommu_accel.h @@ -17,6 +17,9 @@ bool vtd_check_hiod_accel(IntelIOMMUState *s, VTDHostIOMM= UDevice *vtd_hiod, Error **errp); VTDHostIOMMUDevice *vtd_find_hiod_iommufd(VTDAddressSpace *as); bool vtd_propagate_guest_pasid(VTDAddressSpace *vtd_as, Error **errp); +void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_= id, + uint32_t pasid, hwaddr addr, + uint64_t npages, bool ih); #else static inline bool vtd_check_hiod_accel(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hiod, @@ -37,5 +40,12 @@ static inline bool vtd_propagate_guest_pasid(VTDAddressS= pace *vtd_as, { return true; } + +static inline void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, + uint16_t domain_id, + uint32_t pasid, hwaddr= addr, + uint64_t npages, bool = ih) +{ +} #endif #endif diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index e987322e93..a2ca79f925 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -622,6 +622,12 @@ typedef struct VTDPASIDCacheInfo { uint32_t pasid; } VTDPASIDCacheInfo; =20 +typedef struct VTDPIOTLBInvInfo { + uint16_t domain_id; + uint32_t pasid; + struct iommu_hwpt_vtd_s1_invalidate *inv_data; +} VTDPIOTLBInvInfo; + /* PASID Table Related Definitions */ #define VTD_PASID_DIR_BASE_ADDR_MASK (~0xfffULL) #define VTD_PASID_TABLE_BASE_ADDR_MASK (~0xfffULL) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index fd58fbdac7..e27f055d03 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2967,6 +2967,8 @@ static void vtd_piotlb_pasid_invalidate(IntelIOMMUSta= te *s, vtd_iommu_lock(s); g_hash_table_foreach_remove(s->iotlb, vtd_hash_remove_by_pasid, &info); + vtd_flush_host_piotlb_all_locked(s, domain_id, pasid, 0, (uint64_t)-1, + false); vtd_iommu_unlock(s); =20 QLIST_FOREACH(vtd_as, &s->vtd_as_with_notifiers, next) { @@ -2986,7 +2988,8 @@ static void vtd_piotlb_pasid_invalidate(IntelIOMMUSta= te *s, } =20 static void vtd_piotlb_page_invalidate(IntelIOMMUState *s, uint16_t domain= _id, - uint32_t pasid, hwaddr addr, uint8_= t am) + uint32_t pasid, hwaddr addr, uint8_= t am, + bool ih) { VTDIOTLBPageInvInfo info; =20 @@ -2998,6 +3001,7 @@ static void vtd_piotlb_page_invalidate(IntelIOMMUStat= e *s, uint16_t domain_id, vtd_iommu_lock(s); g_hash_table_foreach_remove(s->iotlb, vtd_hash_remove_by_page_piotlb, &info); + vtd_flush_host_piotlb_all_locked(s, domain_id, pasid, addr, 1 << am, i= h); vtd_iommu_unlock(s); =20 vtd_iotlb_page_invalidate_notify(s, domain_id, addr, am, pasid); @@ -3029,7 +3033,8 @@ static bool vtd_process_piotlb_desc(IntelIOMMUState *= s, case VTD_INV_DESC_PIOTLB_PSI_IN_PASID: am =3D VTD_INV_DESC_PIOTLB_AM(inv_desc->val[1]); addr =3D (hwaddr) VTD_INV_DESC_PIOTLB_ADDR(inv_desc->val[1]); - vtd_piotlb_page_invalidate(s, domain_id, pasid, addr, am); + vtd_piotlb_page_invalidate(s, domain_id, pasid, addr, am, + VTD_INV_DESC_PIOTLB_IH(inv_desc)); break; =20 default: @@ -5176,7 +5181,7 @@ static int vtd_pri_perform_implicit_invalidation(VTDA= ddressSpace *vtd_as, ret =3D 0; switch (pgtt) { case VTD_SM_PASID_ENTRY_FST: - vtd_piotlb_page_invalidate(s, domain_id, vtd_as->pasid, addr, 0); + vtd_piotlb_page_invalidate(s, domain_id, vtd_as->pasid, addr, 0, f= alse); break; /* Room for other pgtt values */ default: diff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c index 748a6c7e1c..2996e4b640 100644 --- a/hw/i386/intel_iommu_accel.c +++ b/hw/i386/intel_iommu_accel.c @@ -182,3 +182,72 @@ bool vtd_propagate_guest_pasid(VTDAddressSpace *vtd_as= , Error **errp) =20 return vtd_device_detach_iommufd(vtd_hiod, vtd_as, errp); } + +/* + * This function is a loop function for the s->vtd_address_spaces + * list with VTDPIOTLBInvInfo as execution filter. It propagates + * the piotlb invalidation to host. + */ +static void vtd_flush_host_piotlb_locked(gpointer key, gpointer value, + gpointer user_data) +{ + VTDPIOTLBInvInfo *piotlb_info =3D user_data; + VTDAddressSpace *vtd_as =3D value; + VTDHostIOMMUDevice *vtd_hiod =3D vtd_find_hiod_iommufd(vtd_as); + VTDPASIDCacheEntry *pc_entry =3D &vtd_as->pasid_cache_entry; + uint16_t did; + + if (!vtd_hiod) { + return; + } + + assert(vtd_as->pasid =3D=3D PCI_NO_PASID); + + /* Nothing to do if there is no first stage HWPT attached */ + if (!pc_entry->valid || + !vtd_pe_pgtt_is_fst(&pc_entry->pasid_entry)) { + return; + } + + did =3D VTD_SM_PASID_ENTRY_DID(&pc_entry->pasid_entry); + + if (piotlb_info->domain_id =3D=3D did && piotlb_info->pasid =3D=3D PAS= ID_0) { + HostIOMMUDeviceIOMMUFD *idev =3D + HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod); + uint32_t entry_num =3D 1; /* Only implement one request for simpli= city */ + Error *local_err =3D NULL; + struct iommu_hwpt_vtd_s1_invalidate *cache =3D piotlb_info->inv_da= ta; + + if (!iommufd_backend_invalidate_cache(idev->iommufd, vtd_as->fs_hw= pt_id, + IOMMU_HWPT_INVALIDATE_DATA_V= TD_S1, + sizeof(*cache), &entry_num, = cache, + &local_err)) { + /* Something wrong in kernel, but trying to continue */ + error_report_err(local_err); + } + } +} + +void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_= id, + uint32_t pasid, hwaddr addr, + uint64_t npages, bool ih) +{ + struct iommu_hwpt_vtd_s1_invalidate cache_info =3D { 0 }; + VTDPIOTLBInvInfo piotlb_info; + + cache_info.addr =3D addr; + cache_info.npages =3D npages; + cache_info.flags =3D ih ? IOMMU_VTD_INV_FLAGS_LEAF : 0; + + piotlb_info.domain_id =3D domain_id; + piotlb_info.pasid =3D pasid; + piotlb_info.inv_data =3D &cache_info; + + /* + * Go through each vtd_as instance in s->vtd_address_spaces, find out + * affected host devices which need host piotlb invalidation. Piotlb + * invalidation should check pasid cache per architecture point of vie= w. + */ + g_hash_table_foreach(s->vtd_address_spaces, + vtd_flush_host_piotlb_locked, &piotlb_info); +} --=20 2.47.1