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This fixes an assert in tcg_out_op_rrm. Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20251202011228.503007-2-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target-opc.h.inc | 2 ++ tcg/tci.c | 19 +++++++++++++++++++ tcg/tci/tcg-target.c.inc | 14 ++++++++++++-- 3 files changed, 33 insertions(+), 2 deletions(-) diff --git a/tcg/tci/tcg-target-opc.h.inc b/tcg/tci/tcg-target-opc.h.inc index 4eb32ed7361..f8bfffc1251 100644 --- a/tcg/tci/tcg-target-opc.h.inc +++ b/tcg/tci/tcg-target-opc.h.inc @@ -13,3 +13,5 @@ DEF(tci_rotl32, 1, 2, 0, TCG_OPF_NOT_PRESENT) DEF(tci_rotr32, 1, 2, 0, TCG_OPF_NOT_PRESENT) DEF(tci_setcond32, 1, 2, 1, TCG_OPF_NOT_PRESENT) DEF(tci_movcond32, 1, 2, 1, TCG_OPF_NOT_PRESENT) +DEF(tci_qemu_ld_rrr, 1, 2, 0, TCG_OPF_NOT_PRESENT) +DEF(tci_qemu_st_rrr, 0, 3, 0, TCG_OPF_NOT_PRESENT) diff --git a/tcg/tci.c b/tcg/tci.c index 700e6726169..e15d4e8e08b 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -794,12 +794,24 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, taddr =3D regs[r1]; regs[r0] =3D tci_qemu_ld(env, taddr, oi, tb_ptr); break; + case INDEX_op_tci_qemu_ld_rrr: + tci_args_rrr(insn, &r0, &r1, &r2); + taddr =3D regs[r1]; + oi =3D regs[r2]; + regs[r0] =3D tci_qemu_ld(env, taddr, oi, tb_ptr); + break; =20 case INDEX_op_qemu_st: tci_args_rrm(insn, &r0, &r1, &oi); taddr =3D regs[r1]; tci_qemu_st(env, taddr, regs[r0], oi, tb_ptr); break; + case INDEX_op_tci_qemu_st_rrr: + tci_args_rrr(insn, &r0, &r1, &r2); + taddr =3D regs[r1]; + oi =3D regs[r2]; + tci_qemu_st(env, taddr, regs[r0], oi, tb_ptr); + break; =20 case INDEX_op_qemu_ld2: tcg_debug_assert(TCG_TARGET_REG_BITS =3D=3D 32); @@ -1050,6 +1062,13 @@ int print_insn_tci(bfd_vma addr, disassemble_info *i= nfo) op_name, str_r(r0), str_r(r1), oi); break; =20 + case INDEX_op_tci_qemu_ld_rrr: + case INDEX_op_tci_qemu_st_rrr: + tci_args_rrr(insn, &r0, &r1, &r2); + info->fprintf_func(info->stream, "%-12s %s, %s, %s", + op_name, str_r(r0), str_r(r1), str_r(r2)); + break; + case INDEX_op_qemu_ld2: case INDEX_op_qemu_st2: tci_args_rrrr(insn, &r0, &r1, &r2, &r3); diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 35c66a48369..532f87262c4 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -1188,7 +1188,12 @@ static const TCGOutOpStore outop_st =3D { static void tgen_qemu_ld(TCGContext *s, TCGType type, TCGReg data, TCGReg addr, MemOpIdx oi) { - tcg_out_op_rrm(s, INDEX_op_qemu_ld, data, addr, oi); + if (oi & ~0xffff) { + tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, oi); + tcg_out_op_rrr(s, INDEX_op_tci_qemu_ld_rrr, data, addr, TCG_REG_TM= P); + } else { + tcg_out_op_rrm(s, INDEX_op_qemu_ld, data, addr, oi); + } } =20 static const TCGOutOpQemuLdSt outop_qemu_ld =3D { @@ -1213,7 +1218,12 @@ static const TCGOutOpQemuLdSt2 outop_qemu_ld2 =3D { static void tgen_qemu_st(TCGContext *s, TCGType type, TCGReg data, TCGReg addr, MemOpIdx oi) { - tcg_out_op_rrm(s, INDEX_op_qemu_st, data, addr, oi); + if (oi & ~0xffff) { + tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, oi); + tcg_out_op_rrr(s, INDEX_op_tci_qemu_st_rrr, data, addr, TCG_REG_TM= P); + } else { + tcg_out_op_rrm(s, INDEX_op_qemu_st, data, addr, oi); + } } =20 static const TCGOutOpQemuLdSt outop_qemu_st =3D { --=20 2.51.0 From nobody Mon Feb 9 02:39:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1764774202781922.0786605420699; Wed, 3 Dec 2025 07:03:22 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vQoNH-0007pJ-Dc; Wed, 03 Dec 2025 10:02:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vQoNE-0007nw-N1 for qemu-devel@nongnu.org; Wed, 03 Dec 2025 10:02:32 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vQoNC-0008VS-T1 for qemu-devel@nongnu.org; Wed, 03 Dec 2025 10:02:32 -0500 Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-42e2e50c233so1934796f8f.3 for ; Wed, 03 Dec 2025 07:02:30 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tcg-op-ldst.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c index 67c15fd4d0d..50bb6853f6c 100644 --- a/tcg/tcg-op-ldst.c +++ b/tcg/tcg-op-ldst.c @@ -135,6 +135,16 @@ static void tcg_gen_req_mo(TCGBar type) } } =20 +static TCGv_i64 maybe_extend_addr64(TCGTemp *addr) +{ + if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { + TCGv_i64 a64 =3D tcg_temp_ebb_new_i64(); + tcg_gen_extu_i32_i64(a64, temp_tcgv_i32(addr)); + return a64; + } + return temp_tcgv_i64(addr); +} + /* Only required for loads, where value might overlap addr. */ static TCGv_i64 plugin_maybe_preserve_addr(TCGTemp *addr) { @@ -153,6 +163,13 @@ static TCGv_i64 plugin_maybe_preserve_addr(TCGTemp *ad= dr) return NULL; } =20 +static void maybe_free_addr64(TCGv_i64 a64) +{ + if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { + tcg_temp_free_i64(a64); + } +} + #ifdef CONFIG_PLUGIN static void plugin_gen_mem_callbacks(TCGv_i64 copy_addr, TCGTemp *orig_addr, MemOpIdx = oi, @@ -508,23 +525,6 @@ static void canonicalize_memop_i128_as_i64(MemOp ret[2= ], MemOp orig) ret[1] =3D mop_2; } =20 -static TCGv_i64 maybe_extend_addr64(TCGTemp *addr) -{ - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - TCGv_i64 a64 =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(a64, temp_tcgv_i32(addr)); - return a64; - } - return temp_tcgv_i64(addr); -} - -static void maybe_free_addr64(TCGv_i64 a64) -{ - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - tcg_temp_free_i64(a64); - } -} - static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCGTemp *addr, TCGArg idx, MemOp memop) { --=20 2.51.0 From nobody Mon Feb 9 02:39:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1764774205; cv=none; d=zohomail.com; s=zohoarc; b=fTgcdni0LyM+Hu+Rt5pQqaDiM8Js143R5XHoGXMZYX7KrEOxOJyu+N+ED/FZ14CfDUxofJK0US3zh0xEw7Cqw/1zxlqJf43oRozO7100oBJisk0iJA16ar4SbHX5kkb4b2TWd7Mj+62PUHPt6SkR1rLLcdGohVYxFaSlrBJz+tM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1764774205; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=DqUn3oQBbfn0zcKaFRNf4PkmwosSn3c3ey6cFzh81YQ=; b=U4mZwl5Am30npvxTgrc8MS872Jj7w0U/SM63l4PyPSRVLx+s0+zkTbJtOftWyLmy4FYrM5vYmzvXt6pqNap+HQID2LxSYW8F288w+iHmY3c6wRvhOM3BDKPkZf3fwn5O7mnnDhl0Wi/MMXHYs96Tlu4bUu41rwMgiYH7wqHMl1o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1764774204980432.68630221157025; Wed, 3 Dec 2025 07:03:24 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vQoNc-0007rs-HP; Wed, 03 Dec 2025 10:02:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vQoNM-0007qM-GU for qemu-devel@nongnu.org; Wed, 03 Dec 2025 10:02:42 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vQoNJ-0008WB-SG for qemu-devel@nongnu.org; Wed, 03 Dec 2025 10:02:40 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-4779a4fc95aso7554975e9.1 for ; Wed, 03 Dec 2025 07:02:36 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Make the extension for TCI explicit in the opcode stream, much like we already do for plugins and atomic helpers. Fixes: 24e46e6c9d9 ("accel/tcg: Widen tcg-ldst.h addresses to uint64_t") Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20251202011228.503007-3-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tcg-op-ldst.c | 212 ++++++++++++++++++++++------------------------ 1 file changed, 102 insertions(+), 110 deletions(-) diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c index 50bb6853f6c..8e2adef6886 100644 --- a/tcg/tcg-op-ldst.c +++ b/tcg/tcg-op-ldst.c @@ -135,71 +135,53 @@ static void tcg_gen_req_mo(TCGBar type) } } =20 -static TCGv_i64 maybe_extend_addr64(TCGTemp *addr) +static TCGTemp *maybe_extend_or_copy_addr(TCGTemp *addr, + TCGTemp *data, bool force) { - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - TCGv_i64 a64 =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(a64, temp_tcgv_i32(addr)); - return a64; - } - return temp_tcgv_i64(addr); -} + bool do_ext =3D tcg_ctx->addr_type =3D=3D TCG_TYPE_I32; =20 -/* Only required for loads, where value might overlap addr. */ -static TCGv_i64 plugin_maybe_preserve_addr(TCGTemp *addr) -{ -#ifdef CONFIG_PLUGIN +#ifdef CONFIG_TCG_INTERPRETER + force =3D true; +#elif defined(CONFIG_PLUGIN) if (tcg_ctx->plugin_insn !=3D NULL) { - /* Save a copy of the vaddr for use after a load. */ - TCGv_i64 temp =3D tcg_temp_ebb_new_i64(); - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - tcg_gen_extu_i32_i64(temp, temp_tcgv_i32(addr)); - } else { + if (!do_ext && data =3D=3D addr) { + /* Save a copy of the vaddr for use after a load. */ + TCGv_i64 temp =3D tcg_temp_ebb_new_i64(); tcg_gen_mov_i64(temp, temp_tcgv_i64(addr)); + return tcgv_i64_temp(temp); } - return temp; + force =3D true; } #endif - return NULL; + if (force && do_ext) { + TCGv_i64 temp =3D tcg_temp_ebb_new_i64(); + tcg_gen_extu_i32_i64(temp, temp_tcgv_i32(addr)); + return tcgv_i64_temp(temp); + } + return addr; } =20 -static void maybe_free_addr64(TCGv_i64 a64) +static void maybe_free_addr(TCGTemp *addr, TCGTemp *ext_addr) { - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - tcg_temp_free_i64(a64); + if (addr !=3D ext_addr) { + tcg_temp_free_internal(ext_addr); } } =20 #ifdef CONFIG_PLUGIN static void -plugin_gen_mem_callbacks(TCGv_i64 copy_addr, TCGTemp *orig_addr, MemOpIdx = oi, +plugin_gen_mem_callbacks(TCGTemp *ext_addr, MemOpIdx oi, enum qemu_plugin_mem_rw rw) { if (tcg_ctx->plugin_insn !=3D NULL) { qemu_plugin_meminfo_t info =3D make_plugin_meminfo(oi, rw); - - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - if (!copy_addr) { - copy_addr =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(copy_addr, temp_tcgv_i32(orig_addr)); - } - tcg_gen_plugin_mem_cb(copy_addr, info); - tcg_temp_free_i64(copy_addr); - } else { - if (copy_addr) { - tcg_gen_plugin_mem_cb(copy_addr, info); - tcg_temp_free_i64(copy_addr); - } else { - tcg_gen_plugin_mem_cb(temp_tcgv_i64(orig_addr), info); - } - } + tcg_gen_plugin_mem_cb(temp_tcgv_i64(ext_addr), info); } } #endif =20 static void -plugin_gen_mem_callbacks_i32(TCGv_i32 val, - TCGv_i64 copy_addr, TCGTemp *orig_addr, +plugin_gen_mem_callbacks_i32(TCGv_i32 val, TCGTemp *ext_addr, MemOpIdx oi, enum qemu_plugin_mem_rw rw) { #ifdef CONFIG_PLUGIN @@ -207,14 +189,13 @@ plugin_gen_mem_callbacks_i32(TCGv_i32 val, tcg_gen_st_i32(val, tcg_env, offsetof(CPUState, neg.plugin_mem_value_low) - sizeof(CPUState) + (HOST_BIG_ENDIAN * 4)); - plugin_gen_mem_callbacks(copy_addr, orig_addr, oi, rw); + plugin_gen_mem_callbacks(ext_addr, oi, rw); } #endif } =20 static void -plugin_gen_mem_callbacks_i64(TCGv_i64 val, - TCGv_i64 copy_addr, TCGTemp *orig_addr, +plugin_gen_mem_callbacks_i64(TCGv_i64 val, TCGTemp *ext_addr, MemOpIdx oi, enum qemu_plugin_mem_rw rw) { #ifdef CONFIG_PLUGIN @@ -222,15 +203,14 @@ plugin_gen_mem_callbacks_i64(TCGv_i64 val, tcg_gen_st_i64(val, tcg_env, offsetof(CPUState, neg.plugin_mem_value_low) - sizeof(CPUState)); - plugin_gen_mem_callbacks(copy_addr, orig_addr, oi, rw); + plugin_gen_mem_callbacks(ext_addr, oi, rw); } #endif } =20 static void -plugin_gen_mem_callbacks_i128(TCGv_i128 val, - TCGv_i64 copy_addr, TCGTemp *orig_addr, - MemOpIdx oi, enum qemu_plugin_mem_rw rw) +plugin_gen_mem_callbacks_i128(TCGv_i128 val, TCGTemp *ext_addr, + MemOpIdx oi, enum qemu_plugin_mem_rw rw) { #ifdef CONFIG_PLUGIN if (tcg_ctx->plugin_insn !=3D NULL) { @@ -240,7 +220,7 @@ plugin_gen_mem_callbacks_i128(TCGv_i128 val, tcg_gen_st_i64(TCGV128_HIGH(val), tcg_env, offsetof(CPUState, neg.plugin_mem_value_high) - sizeof(CPUState)); - plugin_gen_mem_callbacks(copy_addr, orig_addr, oi, rw); + plugin_gen_mem_callbacks(ext_addr, oi, rw); } #endif } @@ -250,7 +230,7 @@ static void tcg_gen_qemu_ld_i32_int(TCGv_i32 val, TCGTe= mp *addr, { MemOp orig_memop; MemOpIdx orig_oi, oi; - TCGv_i64 copy_addr; + TCGTemp *ext_addr; =20 tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); orig_memop =3D memop =3D tcg_canonicalize_memop(memop, 0, 0); @@ -265,10 +245,10 @@ static void tcg_gen_qemu_ld_i32_int(TCGv_i32 val, TCG= Temp *addr, oi =3D make_memop_idx(memop, idx); } =20 - copy_addr =3D plugin_maybe_preserve_addr(addr); - gen_ldst1(INDEX_op_qemu_ld, TCG_TYPE_I32, tcgv_i32_temp(val), addr, oi= ); - plugin_gen_mem_callbacks_i32(val, copy_addr, addr, orig_oi, - QEMU_PLUGIN_MEM_R); + ext_addr =3D maybe_extend_or_copy_addr(addr, tcgv_i32_temp(val), false= ); + gen_ldst1(INDEX_op_qemu_ld, TCG_TYPE_I32, tcgv_i32_temp(val), ext_addr= , oi); + plugin_gen_mem_callbacks_i32(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_R= ); + maybe_free_addr(addr, ext_addr); =20 if ((orig_memop ^ memop) & MO_BSWAP) { switch (orig_memop & MO_SIZE) { @@ -299,6 +279,7 @@ static void tcg_gen_qemu_st_i32_int(TCGv_i32 val, TCGTe= mp *addr, { TCGv_i32 swap =3D NULL; MemOpIdx orig_oi, oi; + TCGTemp *ext_addr; =20 tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); memop =3D tcg_canonicalize_memop(memop, 0, 1); @@ -321,8 +302,10 @@ static void tcg_gen_qemu_st_i32_int(TCGv_i32 val, TCGT= emp *addr, oi =3D make_memop_idx(memop, idx); } =20 - gen_ldst1(INDEX_op_qemu_st, TCG_TYPE_I32, tcgv_i32_temp(val), addr, oi= ); - plugin_gen_mem_callbacks_i32(val, NULL, addr, orig_oi, QEMU_PLUGIN_MEM= _W); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, false); + gen_ldst1(INDEX_op_qemu_st, TCG_TYPE_I32, tcgv_i32_temp(val), ext_addr= , oi); + plugin_gen_mem_callbacks_i32(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_W= ); + maybe_free_addr(addr, ext_addr); =20 if (swap) { tcg_temp_free_i32(swap); @@ -342,7 +325,7 @@ static void tcg_gen_qemu_ld_i64_int(TCGv_i64 val, TCGTe= mp *addr, { MemOp orig_memop; MemOpIdx orig_oi, oi; - TCGv_i64 copy_addr; + TCGTemp *ext_addr; =20 if (TCG_TARGET_REG_BITS =3D=3D 32 && (memop & MO_SIZE) < MO_64) { tcg_gen_qemu_ld_i32_int(TCGV_LOW(val), addr, idx, memop); @@ -367,10 +350,10 @@ static void tcg_gen_qemu_ld_i64_int(TCGv_i64 val, TCG= Temp *addr, oi =3D make_memop_idx(memop, idx); } =20 - copy_addr =3D plugin_maybe_preserve_addr(addr); - gen_ld_i64(val, addr, oi); - plugin_gen_mem_callbacks_i64(val, copy_addr, addr, orig_oi, - QEMU_PLUGIN_MEM_R); + ext_addr =3D maybe_extend_or_copy_addr(addr, tcgv_i64_temp(val), false= ); + gen_ld_i64(val, ext_addr, oi); + plugin_gen_mem_callbacks_i64(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_R= ); + maybe_free_addr(addr, ext_addr); =20 if ((orig_memop ^ memop) & MO_BSWAP) { int flags =3D (orig_memop & MO_SIGN @@ -405,6 +388,7 @@ static void tcg_gen_qemu_st_i64_int(TCGv_i64 val, TCGTe= mp *addr, { TCGv_i64 swap =3D NULL; MemOpIdx orig_oi, oi; + TCGTemp *ext_addr; =20 if (TCG_TARGET_REG_BITS =3D=3D 32 && (memop & MO_SIZE) < MO_64) { tcg_gen_qemu_st_i32_int(TCGV_LOW(val), addr, idx, memop); @@ -435,8 +419,10 @@ static void tcg_gen_qemu_st_i64_int(TCGv_i64 val, TCGT= emp *addr, oi =3D make_memop_idx(memop, idx); } =20 - gen_st_i64(val, addr, oi); - plugin_gen_mem_callbacks_i64(val, NULL, addr, orig_oi, QEMU_PLUGIN_MEM= _W); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, false); + gen_st_i64(val, ext_addr, oi); + plugin_gen_mem_callbacks_i64(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_W= ); + maybe_free_addr(addr, ext_addr); =20 if (swap) { tcg_temp_free_i64(swap); @@ -529,7 +515,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, TCGArg idx, MemOp memop) { MemOpIdx orig_oi; - TCGv_i64 ext_addr =3D NULL; + TCGTemp *ext_addr; =20 check_max_alignment(memop_alignment_bits(memop)); tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); @@ -540,6 +526,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, memop |=3D MO_ATOM_NONE; } orig_oi =3D make_memop_idx(memop, idx); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, false); =20 /* TODO: For now, force 32-bit hosts to use the helper. */ if (TCG_TARGET_HAS_qemu_ldst_i128 && TCG_TARGET_REG_BITS =3D=3D 64) { @@ -558,7 +545,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, } =20 gen_ldst2(INDEX_op_qemu_ld2, TCG_TYPE_I128, tcgv_i64_temp(lo), - tcgv_i64_temp(hi), addr, oi); + tcgv_i64_temp(hi), ext_addr, oi); =20 if (need_bswap) { tcg_gen_bswap64_i64(lo, lo); @@ -566,7 +553,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, } } else if (use_two_i64_for_i128(memop)) { MemOp mop[2]; - TCGTemp *addr_p8; + TCGTemp *addr_p8, *ext_addr_p8; TCGv_i64 x, y; bool need_bswap; =20 @@ -586,7 +573,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, y =3D TCGV128_LOW(val); } =20 - gen_ld_i64(x, addr, make_memop_idx(mop[0], idx)); + gen_ld_i64(x, ext_addr, make_memop_idx(mop[0], idx)); =20 if (need_bswap) { tcg_gen_bswap64_i64(x, x); @@ -601,25 +588,25 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, T= CGTemp *addr, tcg_gen_addi_i64(t, temp_tcgv_i64(addr), 8); addr_p8 =3D tcgv_i64_temp(t); } + ext_addr_p8 =3D maybe_extend_or_copy_addr(addr_p8, NULL, false); =20 gen_ld_i64(y, addr_p8, make_memop_idx(mop[1], idx)); + maybe_free_addr(addr_p8, ext_addr_p8); tcg_temp_free_internal(addr_p8); =20 if (need_bswap) { tcg_gen_bswap64_i64(y, y); } } else { - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - ext_addr =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(ext_addr, temp_tcgv_i32(addr)); - addr =3D tcgv_i64_temp(ext_addr); + if (ext_addr =3D=3D addr) { + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); } - gen_helper_ld_i128(val, tcg_env, temp_tcgv_i64(addr), + gen_helper_ld_i128(val, tcg_env, temp_tcgv_i64(ext_addr), tcg_constant_i32(orig_oi)); } =20 - plugin_gen_mem_callbacks_i128(val, ext_addr, addr, orig_oi, - QEMU_PLUGIN_MEM_R); + plugin_gen_mem_callbacks_i128(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_= R); + maybe_free_addr(addr, ext_addr); } =20 void tcg_gen_qemu_ld_i128_chk(TCGv_i128 val, TCGTemp *addr, TCGArg idx, @@ -635,7 +622,7 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCG= Temp *addr, TCGArg idx, MemOp memop) { MemOpIdx orig_oi; - TCGv_i64 ext_addr =3D NULL; + TCGTemp *ext_addr; =20 check_max_alignment(memop_alignment_bits(memop)); tcg_gen_req_mo(TCG_MO_ST_LD | TCG_MO_ST_ST); @@ -646,6 +633,7 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCG= Temp *addr, memop |=3D MO_ATOM_NONE; } orig_oi =3D make_memop_idx(memop, idx); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, false); =20 /* TODO: For now, force 32-bit hosts to use the helper. */ =20 @@ -667,7 +655,7 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCG= Temp *addr, } =20 gen_ldst2(INDEX_op_qemu_st2, TCG_TYPE_I128, - tcgv_i64_temp(lo), tcgv_i64_temp(hi), addr, oi); + tcgv_i64_temp(lo), tcgv_i64_temp(hi), ext_addr, oi); =20 if (need_bswap) { tcg_temp_free_i64(lo); @@ -675,7 +663,7 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCG= Temp *addr, } } else if (use_two_i64_for_i128(memop)) { MemOp mop[2]; - TCGTemp *addr_p8; + TCGTemp *addr_p8, *ext_addr_p8; TCGv_i64 x, y, b =3D NULL; =20 canonicalize_memop_i128_as_i64(mop, memop); @@ -705,27 +693,27 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, T= CGTemp *addr, tcg_gen_addi_i64(t, temp_tcgv_i64(addr), 8); addr_p8 =3D tcgv_i64_temp(t); } + ext_addr_p8 =3D maybe_extend_or_copy_addr(addr_p8, NULL, false); =20 if (b) { tcg_gen_bswap64_i64(b, y); - gen_st_i64(b, addr_p8, make_memop_idx(mop[1], idx)); + gen_st_i64(b, ext_addr_p8, make_memop_idx(mop[1], idx)); tcg_temp_free_i64(b); } else { - gen_st_i64(y, addr_p8, make_memop_idx(mop[1], idx)); + gen_st_i64(y, ext_addr_p8, make_memop_idx(mop[1], idx)); } + maybe_free_addr(addr_p8, ext_addr_p8); tcg_temp_free_internal(addr_p8); } else { - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - ext_addr =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(ext_addr, temp_tcgv_i32(addr)); - addr =3D tcgv_i64_temp(ext_addr); + if (ext_addr =3D=3D addr) { + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); } - gen_helper_st_i128(tcg_env, temp_tcgv_i64(addr), val, + gen_helper_st_i128(tcg_env, temp_tcgv_i64(ext_addr), val, tcg_constant_i32(orig_oi)); } =20 - plugin_gen_mem_callbacks_i128(val, ext_addr, addr, orig_oi, - QEMU_PLUGIN_MEM_W); + plugin_gen_mem_callbacks_i128(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_= W); + maybe_free_addr(addr, ext_addr); } =20 void tcg_gen_qemu_st_i128_chk(TCGv_i128 val, TCGTemp *addr, TCGArg idx, @@ -864,7 +852,7 @@ static void tcg_gen_atomic_cmpxchg_i32_int(TCGv_i32 ret= v, TCGTemp *addr, TCGArg idx, MemOp memop) { gen_atomic_cx_i32 gen; - TCGv_i64 a64; + TCGTemp *ext_addr; MemOpIdx oi; =20 if (!(tcg_ctx->gen_tb->cflags & CF_PARALLEL)) { @@ -877,9 +865,10 @@ static void tcg_gen_atomic_cmpxchg_i32_int(TCGv_i32 re= tv, TCGTemp *addr, tcg_debug_assert(gen !=3D NULL); =20 oi =3D make_memop_idx(memop & ~MO_SIGN, idx); - a64 =3D maybe_extend_addr64(addr); - gen(retv, tcg_env, a64, cmpv, newv, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); + gen(retv, tcg_env, temp_tcgv_i64(ext_addr), + cmpv, newv, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); =20 if (memop & MO_SIGN) { tcg_gen_ext_i32(retv, retv, memop); @@ -957,9 +946,10 @@ static void tcg_gen_atomic_cmpxchg_i64_int(TCGv_i64 re= tv, TCGTemp *addr, gen =3D table_cmpxchg[memop & (MO_SIZE | MO_BSWAP)]; if (gen) { MemOpIdx oi =3D make_memop_idx(memop, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); - gen(retv, tcg_env, a64, cmpv, newv, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, tr= ue); + gen(retv, tcg_env, temp_tcgv_i64(ext_addr), + cmpv, newv, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); return; } =20 @@ -1019,11 +1009,11 @@ static void tcg_gen_nonatomic_cmpxchg_i128_int(TCGv= _i128 retv, TCGTemp *addr, if (TCG_TARGET_REG_BITS =3D=3D 32) { /* Inline expansion below is simply too large for 32-bit hosts. */ MemOpIdx oi =3D make_memop_idx(memop, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); =20 - gen_helper_nonatomic_cmpxchgo(retv, tcg_env, a64, cmpv, newv, - tcg_constant_i32(oi)); - maybe_free_addr64(a64); + gen_helper_nonatomic_cmpxchgo(retv, tcg_env, temp_tcgv_i64(ext_add= r), + cmpv, newv, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); } else { TCGv_i128 oldv =3D tcg_temp_ebb_new_i128(); TCGv_i128 tmpv =3D tcg_temp_ebb_new_i128(); @@ -1079,9 +1069,10 @@ static void tcg_gen_atomic_cmpxchg_i128_int(TCGv_i12= 8 retv, TCGTemp *addr, gen =3D table_cmpxchg[memop & (MO_SIZE | MO_BSWAP)]; if (gen) { MemOpIdx oi =3D make_memop_idx(memop, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); - gen(retv, tcg_env, a64, cmpv, newv, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); + gen(retv, tcg_env, temp_tcgv_i64(ext_addr), + cmpv, newv, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); return; } =20 @@ -1129,7 +1120,7 @@ static void do_atomic_op_i32(TCGv_i32 ret, TCGTemp *a= ddr, TCGv_i32 val, TCGArg idx, MemOp memop, void * const table[]) { gen_atomic_op_i32 gen; - TCGv_i64 a64; + TCGTemp *ext_addr; MemOpIdx oi; =20 memop =3D tcg_canonicalize_memop(memop, 0, 0); @@ -1138,9 +1129,9 @@ static void do_atomic_op_i32(TCGv_i32 ret, TCGTemp *a= ddr, TCGv_i32 val, tcg_debug_assert(gen !=3D NULL); =20 oi =3D make_memop_idx(memop & ~MO_SIGN, idx); - a64 =3D maybe_extend_addr64(addr); - gen(ret, tcg_env, a64, val, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); + gen(ret, tcg_env, temp_tcgv_i64(ext_addr), val, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); =20 if (memop & MO_SIGN) { tcg_gen_ext_i32(ret, ret, memop); @@ -1176,9 +1167,10 @@ static void do_atomic_op_i64(TCGv_i64 ret, TCGTemp *= addr, TCGv_i64 val, =20 if (gen) { MemOpIdx oi =3D make_memop_idx(memop & ~MO_SIGN, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); - gen(ret, tcg_env, a64, val, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, tr= ue); + gen(ret, tcg_env, temp_tcgv_i64(ext_addr), + val, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); return; } =20 @@ -1227,9 +1219,9 @@ static void do_atomic_op_i128(TCGv_i128 ret, TCGTemp = *addr, TCGv_i128 val, =20 if (gen) { MemOpIdx oi =3D make_memop_idx(memop & ~MO_SIGN, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); - gen(ret, tcg_env, a64, val, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); + gen(ret, tcg_env, temp_tcgv_i64(ext_addr), val, tcg_constant_i32(o= i)); + maybe_free_addr(addr, ext_addr); return; } =20 --=20 2.51.0