From nobody Mon Feb 9 20:41:03 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1764638000; cv=none; d=zohomail.com; s=zohoarc; b=We1iZTbNWRnKTWDktb/va38iMgM6AeL0H7wEC0mWnABnz0hALufc9WxJvWwUkQOwvoSOiIE8JMHt0TCVY6h8yUBrUvadBhaRXuDN1qbZR5MaqRpzDezi8U1tjm4onXGI9ru/jEcn+7P8rgcg4YVCP8UArQDxx381zwxn+mMgLoY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1764638000; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=x+nTrV+MISVUTBqxbLE/Tz8uUSABBgmkkZf5VTW5OmQ=; b=cSmQd9slhpQIZZfnULeRA5D5bd93cK4jjC2hYXCcXizKSDpc+kdl6ma1qaJhi6ZBZJrYKWeM2flbORTWuiYYxHsoJcuGxU337Nu1u8aKN55wBsjhvM76Lg18yh8f+LJt+JJYYAIRo2cCNiLxQeNe5Sp8wWe8WoZE09R1JhcLxNM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1764637999910468.1665395513527; Mon, 1 Dec 2025 17:13:19 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vQEwc-0001Jj-Nx; Mon, 01 Dec 2025 20:12:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vQEwW-0001In-M2 for qemu-devel@nongnu.org; Mon, 01 Dec 2025 20:12:38 -0500 Received: from mail-oa1-x2f.google.com ([2001:4860:4864:20::2f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vQEwU-0007B6-FF for qemu-devel@nongnu.org; Mon, 01 Dec 2025 20:12:36 -0500 Received: by mail-oa1-x2f.google.com with SMTP id 586e51a60fabf-3e7f68df436so2967856fac.1 for ; Mon, 01 Dec 2025 17:12:33 -0800 (PST) Received: from stoup.. ([201.144.25.11]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-3f0dd05bc9asm6458709fac.22.2025.12.01.17.12.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Dec 2025 17:12:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1764637951; x=1765242751; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x+nTrV+MISVUTBqxbLE/Tz8uUSABBgmkkZf5VTW5OmQ=; b=Jlva2oNs80eUquuzVhU7SqN6A2ydeXx23z8B4nGDLpmA9eQpL1YrYuS9vVbAayTVtt Uuwdjyinsw+niRTTYYWgA0huTOSwWhWbXVWMpGs7puQMhrrjZ6JSzY0IIpn5+5C+wwMg lVXRCsHfShVAcEtNVLoXGC827Ea2VJaUCjmZOYvv/F+pOJVfjB3E8ZJb6ZGiz1mTD4DC HTcM7s2voBttxLm5obkZR1PNBQPP31iDafBMpjp4rddQBjN34/teGaEdJ/HQAFrA4Lpm ONAxxwrQDZflBPoWl/isqssMTX/q1uIByUh+2lc2T69J77wGXxOKChO3RzSbR0mcupJS 0e/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764637951; x=1765242751; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=x+nTrV+MISVUTBqxbLE/Tz8uUSABBgmkkZf5VTW5OmQ=; b=kEtY5x6Hi4lUmaKi/KpxKw6w5J+1C7rygwdu1w/eJkqYg9Du8+F/RTLXZlrfX28TJT Uj+j7uv5hyR4osrnDMszhw02977WjFli68TNbX+3lHhzLYXRso3Oev7LtP3aO/NQz/uK jTrwrOi9jSqwGFezordv8QeF+9Lgi14lV9njgbkAgDIS4fY/2D0TGPgYSRWbIaJMh/Sp UTu/s5AEnW/ZYNAvC9M+TNiufQJJ7lcwWLAA2c9mM/656LoPkNqMYo2Vacf6DfePI47d zNwBN/LYF7xvMbiWjuElZs6I9aTxanVD2XOrbZ/q9HoQmpmOlzK8MmrrGB4q1rIKN8n8 nY5A== X-Gm-Message-State: AOJu0Yzyqx26BFkEcAucTf2AwmTM6b+M1/ZV2a4vj6ot+SRdc90VWrL3 D15nwAbvi4DGTgJ4fdQWbaUw/F75yHpUv98kF6vOgwVnU6E8MeAF5stRvdHD7M+zxHng61K4P4f AA9yYtLE= X-Gm-Gg: ASbGnctdKOuY6S9kFnCFIgDHlfti11VDOTbMnsSl4EdJBWO9Qy/t+sNumBc7dhsRror PKL9yh9ixX0KkV2alj+M/YjOs2p9x2zab3JWt0I5wSV9c3D1f+e8XxLtwsy7Nyg10T1vCe0A/zd EpfFaQi/3AIJgzl+Kmmj2x1SXnF9zSrX+EoMH5E8fn6s2VGlMig38LTVeQzSedYL37kd+MXI5Pp YUB0Y21tV9xdAbr2WRtCXQdIZJJWZj7XUwGyNcn21dggbK9LMvvkFVrX4lBr0F49IyB69TGLjX0 h+Me/ooVTX3r7ZppM7R4YmzuwaCJShAC89dNdJKMME02fZOz/QhPAiCDUaWQkGGyZc7ydp8IHNk RPQYkGQY3itrZTrIw+H93AJkWr+2AN3QEXCuEAJHlVIt0ADJ66OAg18+uuO5Ktc5bFun7FUEKep Y3HYDzKFJ8qBwOHns= X-Google-Smtp-Source: AGHT+IFxPSeEVWl4lSDwIFsuJh3i6+ApICrzDi2M33UXTO6N8vpIuugYeBefZ0+Eb6sYp2BboepsBw== X-Received: by 2002:a05:6870:8193:b0:3d2:1a91:2f1e with SMTP id 586e51a60fabf-3f14f18483emr481285fac.8.1764637951387; Mon, 01 Dec 2025 17:12:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: alex.bennee@linaro.org, peter.maydell@linaro.org Subject: [PATCH 1/2] tcg/tci: Introduce INDEX_op_tci_qemu_{ld,st}_rrr Date: Mon, 1 Dec 2025 17:12:26 -0800 Message-ID: <20251202011228.503007-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251202011228.503007-1-richard.henderson@linaro.org> References: <20251202011228.503007-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:4860:4864:20::2f; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1764638000948019200 Content-Type: text/plain; charset="utf-8" Since d182123974c4, the number of bits in a MemOpIdx tops out at 17. This fixes an assert in tcg_out_op_rrm. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Alex Benn=C3=A9e Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 19 +++++++++++++++++++ tcg/tci/tcg-target-opc.h.inc | 2 ++ tcg/tci/tcg-target.c.inc | 14 ++++++++++++-- 3 files changed, 33 insertions(+), 2 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 700e672616..e15d4e8e08 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -794,12 +794,24 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, taddr =3D regs[r1]; regs[r0] =3D tci_qemu_ld(env, taddr, oi, tb_ptr); break; + case INDEX_op_tci_qemu_ld_rrr: + tci_args_rrr(insn, &r0, &r1, &r2); + taddr =3D regs[r1]; + oi =3D regs[r2]; + regs[r0] =3D tci_qemu_ld(env, taddr, oi, tb_ptr); + break; =20 case INDEX_op_qemu_st: tci_args_rrm(insn, &r0, &r1, &oi); taddr =3D regs[r1]; tci_qemu_st(env, taddr, regs[r0], oi, tb_ptr); break; + case INDEX_op_tci_qemu_st_rrr: + tci_args_rrr(insn, &r0, &r1, &r2); + taddr =3D regs[r1]; + oi =3D regs[r2]; + tci_qemu_st(env, taddr, regs[r0], oi, tb_ptr); + break; =20 case INDEX_op_qemu_ld2: tcg_debug_assert(TCG_TARGET_REG_BITS =3D=3D 32); @@ -1050,6 +1062,13 @@ int print_insn_tci(bfd_vma addr, disassemble_info *i= nfo) op_name, str_r(r0), str_r(r1), oi); break; =20 + case INDEX_op_tci_qemu_ld_rrr: + case INDEX_op_tci_qemu_st_rrr: + tci_args_rrr(insn, &r0, &r1, &r2); + info->fprintf_func(info->stream, "%-12s %s, %s, %s", + op_name, str_r(r0), str_r(r1), str_r(r2)); + break; + case INDEX_op_qemu_ld2: case INDEX_op_qemu_st2: tci_args_rrrr(insn, &r0, &r1, &r2, &r3); diff --git a/tcg/tci/tcg-target-opc.h.inc b/tcg/tci/tcg-target-opc.h.inc index 4eb32ed736..f8bfffc125 100644 --- a/tcg/tci/tcg-target-opc.h.inc +++ b/tcg/tci/tcg-target-opc.h.inc @@ -13,3 +13,5 @@ DEF(tci_rotl32, 1, 2, 0, TCG_OPF_NOT_PRESENT) DEF(tci_rotr32, 1, 2, 0, TCG_OPF_NOT_PRESENT) DEF(tci_setcond32, 1, 2, 1, TCG_OPF_NOT_PRESENT) DEF(tci_movcond32, 1, 2, 1, TCG_OPF_NOT_PRESENT) +DEF(tci_qemu_ld_rrr, 1, 2, 0, TCG_OPF_NOT_PRESENT) +DEF(tci_qemu_st_rrr, 0, 3, 0, TCG_OPF_NOT_PRESENT) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 35c66a4836..532f87262c 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -1188,7 +1188,12 @@ static const TCGOutOpStore outop_st =3D { static void tgen_qemu_ld(TCGContext *s, TCGType type, TCGReg data, TCGReg addr, MemOpIdx oi) { - tcg_out_op_rrm(s, INDEX_op_qemu_ld, data, addr, oi); + if (oi & ~0xffff) { + tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, oi); + tcg_out_op_rrr(s, INDEX_op_tci_qemu_ld_rrr, data, addr, TCG_REG_TM= P); + } else { + tcg_out_op_rrm(s, INDEX_op_qemu_ld, data, addr, oi); + } } =20 static const TCGOutOpQemuLdSt outop_qemu_ld =3D { @@ -1213,7 +1218,12 @@ static const TCGOutOpQemuLdSt2 outop_qemu_ld2 =3D { static void tgen_qemu_st(TCGContext *s, TCGType type, TCGReg data, TCGReg addr, MemOpIdx oi) { - tcg_out_op_rrm(s, INDEX_op_qemu_st, data, addr, oi); + if (oi & ~0xffff) { + tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, oi); + tcg_out_op_rrr(s, INDEX_op_tci_qemu_st_rrr, data, addr, TCG_REG_TM= P); + } else { + tcg_out_op_rrm(s, INDEX_op_qemu_st, data, addr, oi); + } } =20 static const TCGOutOpQemuLdSt outop_qemu_st =3D { --=20 2.43.0 From nobody Mon Feb 9 20:41:03 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1764638016; cv=none; d=zohomail.com; s=zohoarc; b=JSrDllC8SmxkpVb1fG5umVRpJrNyAl8BI9xZdqc5MCpvENQ6Ln4uekiLNx8sYeccFOLbSLRfgMf9fYOASrdKnqsCdOK6/Gpsnh+1JqVUpi2s9BpWpjm8+dZNCOW/t8jnRMqqVBsKeELPNhZh/sdZRO2LugbirFjkqqlaHr/5Wr0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1764638016; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=WynUtuuokXUbONodInAeO6RSF32Dk2kzzljIHwelHoQ=; b=XrbbZ4u3tH/4kKzNODHNWKKtqQsgAvjbKa0eiwrinM25WF4dftzlP2NAo3YV0glo0QwP6776o7rc1dMyGcuYNWUAjeYvRfsqtipP0D6W6TEZiRNA6Vhe4c9eLTnm4jFWsjZ6hp8LisrKIeZQA4XbTlC+ymxEyglOVIFR5EjYe4E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1764638016317892.929931567385; Mon, 1 Dec 2025 17:13:36 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vQEwd-0001KA-6n; Mon, 01 Dec 2025 20:12:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vQEwW-0001Io-UY for qemu-devel@nongnu.org; Mon, 01 Dec 2025 20:12:38 -0500 Received: from mail-oa1-x2b.google.com ([2001:4860:4864:20::2b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vQEwT-0007BD-Sl for qemu-devel@nongnu.org; Mon, 01 Dec 2025 20:12:36 -0500 Received: by mail-oa1-x2b.google.com with SMTP id 586e51a60fabf-3ec46e3c65bso4085031fac.0 for ; Mon, 01 Dec 2025 17:12:33 -0800 (PST) Received: from stoup.. ([201.144.25.11]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-3f0dd05bc9asm6458709fac.22.2025.12.01.17.12.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Dec 2025 17:12:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1764637952; x=1765242752; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WynUtuuokXUbONodInAeO6RSF32Dk2kzzljIHwelHoQ=; b=kpy4At+Rt5Pov3Om0v7m9x3V9ORDLda2C80gTtQEymORILaKmuJVAA+ceRH3bMoRG5 b1vbAYO7nOCkwFqUJkQ2o07j49tX136rTqYnSLdX0Oa4yjQNNIcwKVr9IBjuvZAdhWR7 u+N5UT8amGZkAJDz5zFnRhIRlfu7v5JRey9uVysuFfUXjPgwqmgxtkvWoZzclwsP5jQp ar4bn/6+Oa2BRCLr+3hHmD/X1dQdPtSG8SRn040xqVf4AC0PoQP/ocynpZilqLceyBsa V3BML9avokPWt6UY6Ax+e1feEkr8p08anvpn+EtQvwbk/D90GaoX45lVfZHIzdkQIXuZ /IyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764637952; x=1765242752; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=WynUtuuokXUbONodInAeO6RSF32Dk2kzzljIHwelHoQ=; b=HNlnmjq01ZJkTXjg7imx0FqVw/tMJkc6ClaufXL99EFhVvP2n+KK37C148sVjXTDpC c4BzZiAJDqVRmaeyQ2/MW1rsJ5EfIzCkQxAOCfsDm4CJ+vENoOe6O2/9WVnTFPIGAjAz AjBOHheHzJXxlnc/jOORr9fEStkuLCeaznnShvOFl+vXWMl89EWD2lsdCn3QhqgHD0Jr 2midkJXzsQuUC25HZKMsWuGDwSzCW0rvKUqxRGmjKEXJ/Cu80K6pImE+ohFLxmIewO63 I869y8e80oxFcylIGKSuq7ovcxQvaXFn3evAbw3WhsXsQbZDuaHIRxcinxN2UDtbVc0Q A7vA== X-Gm-Message-State: AOJu0YwlwClZM1VHcQON87TlWPk3wr5QoU4e3Kpwq+O3XdJYOkIYzpvl wD1PFfoY0pGnD7X8u9YYbc82wRTjMRxbVUqhmzqxXZbmCw03swzxox+8mzsrLYBVsCLyFzFm29a GR1b3alg= X-Gm-Gg: ASbGncsGYxvRRJETDTrZwqUGcO2fs5K6C/czf36ktqTwwyZqOUaW9oNzoqwFDR03y9O u4/VsL5JaSHjh67KineAyXDE4H048YY5r1YL3nfKuYnKT0ZrGPU7ZEpRs2/hebqb3yBovEQVG9C 4WNq4bGb5h6ydi2ZhfjD1xBNv27EUMxRGGO+TxeQp9sPvJWB5/bOh6WGV33efX1lb8oq6IBm8j+ GPGEvEeAJY6BrG56u6wKQCoU6ksvP2GA5+SNFqn3uapx3i4Es/VwDa1hp+x3VcFa5S4AgmPeQq1 K8+i00GQaYddJehv1Ik/NnRBi9nlTw0p3idLoAmJKtAZLfvxWC1t+TdD6Swlkl7NLTzJifmmfr6 wj4quqkr58NqHa6P2WcRXRW/Aay8f9B/b9658vHdNMrXjYLoi/Ngijv1o74SptUbFTfaAOf+EUa 869hwDOyBJ7Z86tOo= X-Google-Smtp-Source: AGHT+IEHvcOVwZSq8a3wP5n6jBlUOfaPtVVDst6g94gnzAwbqA7CC9ziDcM6vgal7YTYFIGzkJZgDQ== X-Received: by 2002:a05:6871:2edd:b0:3dd:6bdb:e741 with SMTP id 586e51a60fabf-3ecbe52a500mr19744817fac.26.1764637952428; Mon, 01 Dec 2025 17:12:32 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: alex.bennee@linaro.org, peter.maydell@linaro.org Subject: [PATCH 2/2] tcg: Zero extend 32-bit addresses for TCI Date: Mon, 1 Dec 2025 17:12:27 -0800 Message-ID: <20251202011228.503007-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251202011228.503007-1-richard.henderson@linaro.org> References: <20251202011228.503007-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:4860:4864:20::2b; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1764638017354019200 Content-Type: text/plain; charset="utf-8" For native code generation, zero-extending 32-bit addresses for the slow path helpers happens in tcg_out_{ld,st}_helper_args, but there isn't really a slow path for TCI, so that didn't happen. Make the extension for TCI explicit in the opcode stream, much like we already do for plugins and atomic helpers. Fixes: 24e46e6c9d9 ("accel/tcg: Widen tcg-ldst.h addresses to uint64_t") Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Alex Benn=C3=A9e --- tcg/tcg-op-ldst.c | 222 ++++++++++++++++++++++------------------------ 1 file changed, 107 insertions(+), 115 deletions(-) diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c index 67c15fd4d0..8e2adef688 100644 --- a/tcg/tcg-op-ldst.c +++ b/tcg/tcg-op-ldst.c @@ -135,54 +135,53 @@ static void tcg_gen_req_mo(TCGBar type) } } =20 -/* Only required for loads, where value might overlap addr. */ -static TCGv_i64 plugin_maybe_preserve_addr(TCGTemp *addr) +static TCGTemp *maybe_extend_or_copy_addr(TCGTemp *addr, + TCGTemp *data, bool force) { -#ifdef CONFIG_PLUGIN + bool do_ext =3D tcg_ctx->addr_type =3D=3D TCG_TYPE_I32; + +#ifdef CONFIG_TCG_INTERPRETER + force =3D true; +#elif defined(CONFIG_PLUGIN) if (tcg_ctx->plugin_insn !=3D NULL) { - /* Save a copy of the vaddr for use after a load. */ - TCGv_i64 temp =3D tcg_temp_ebb_new_i64(); - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - tcg_gen_extu_i32_i64(temp, temp_tcgv_i32(addr)); - } else { + if (!do_ext && data =3D=3D addr) { + /* Save a copy of the vaddr for use after a load. */ + TCGv_i64 temp =3D tcg_temp_ebb_new_i64(); tcg_gen_mov_i64(temp, temp_tcgv_i64(addr)); + return tcgv_i64_temp(temp); } - return temp; + force =3D true; } #endif - return NULL; + if (force && do_ext) { + TCGv_i64 temp =3D tcg_temp_ebb_new_i64(); + tcg_gen_extu_i32_i64(temp, temp_tcgv_i32(addr)); + return tcgv_i64_temp(temp); + } + return addr; +} + +static void maybe_free_addr(TCGTemp *addr, TCGTemp *ext_addr) +{ + if (addr !=3D ext_addr) { + tcg_temp_free_internal(ext_addr); + } } =20 #ifdef CONFIG_PLUGIN static void -plugin_gen_mem_callbacks(TCGv_i64 copy_addr, TCGTemp *orig_addr, MemOpIdx = oi, +plugin_gen_mem_callbacks(TCGTemp *ext_addr, MemOpIdx oi, enum qemu_plugin_mem_rw rw) { if (tcg_ctx->plugin_insn !=3D NULL) { qemu_plugin_meminfo_t info =3D make_plugin_meminfo(oi, rw); - - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - if (!copy_addr) { - copy_addr =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(copy_addr, temp_tcgv_i32(orig_addr)); - } - tcg_gen_plugin_mem_cb(copy_addr, info); - tcg_temp_free_i64(copy_addr); - } else { - if (copy_addr) { - tcg_gen_plugin_mem_cb(copy_addr, info); - tcg_temp_free_i64(copy_addr); - } else { - tcg_gen_plugin_mem_cb(temp_tcgv_i64(orig_addr), info); - } - } + tcg_gen_plugin_mem_cb(temp_tcgv_i64(ext_addr), info); } } #endif =20 static void -plugin_gen_mem_callbacks_i32(TCGv_i32 val, - TCGv_i64 copy_addr, TCGTemp *orig_addr, +plugin_gen_mem_callbacks_i32(TCGv_i32 val, TCGTemp *ext_addr, MemOpIdx oi, enum qemu_plugin_mem_rw rw) { #ifdef CONFIG_PLUGIN @@ -190,14 +189,13 @@ plugin_gen_mem_callbacks_i32(TCGv_i32 val, tcg_gen_st_i32(val, tcg_env, offsetof(CPUState, neg.plugin_mem_value_low) - sizeof(CPUState) + (HOST_BIG_ENDIAN * 4)); - plugin_gen_mem_callbacks(copy_addr, orig_addr, oi, rw); + plugin_gen_mem_callbacks(ext_addr, oi, rw); } #endif } =20 static void -plugin_gen_mem_callbacks_i64(TCGv_i64 val, - TCGv_i64 copy_addr, TCGTemp *orig_addr, +plugin_gen_mem_callbacks_i64(TCGv_i64 val, TCGTemp *ext_addr, MemOpIdx oi, enum qemu_plugin_mem_rw rw) { #ifdef CONFIG_PLUGIN @@ -205,15 +203,14 @@ plugin_gen_mem_callbacks_i64(TCGv_i64 val, tcg_gen_st_i64(val, tcg_env, offsetof(CPUState, neg.plugin_mem_value_low) - sizeof(CPUState)); - plugin_gen_mem_callbacks(copy_addr, orig_addr, oi, rw); + plugin_gen_mem_callbacks(ext_addr, oi, rw); } #endif } =20 static void -plugin_gen_mem_callbacks_i128(TCGv_i128 val, - TCGv_i64 copy_addr, TCGTemp *orig_addr, - MemOpIdx oi, enum qemu_plugin_mem_rw rw) +plugin_gen_mem_callbacks_i128(TCGv_i128 val, TCGTemp *ext_addr, + MemOpIdx oi, enum qemu_plugin_mem_rw rw) { #ifdef CONFIG_PLUGIN if (tcg_ctx->plugin_insn !=3D NULL) { @@ -223,7 +220,7 @@ plugin_gen_mem_callbacks_i128(TCGv_i128 val, tcg_gen_st_i64(TCGV128_HIGH(val), tcg_env, offsetof(CPUState, neg.plugin_mem_value_high) - sizeof(CPUState)); - plugin_gen_mem_callbacks(copy_addr, orig_addr, oi, rw); + plugin_gen_mem_callbacks(ext_addr, oi, rw); } #endif } @@ -233,7 +230,7 @@ static void tcg_gen_qemu_ld_i32_int(TCGv_i32 val, TCGTe= mp *addr, { MemOp orig_memop; MemOpIdx orig_oi, oi; - TCGv_i64 copy_addr; + TCGTemp *ext_addr; =20 tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); orig_memop =3D memop =3D tcg_canonicalize_memop(memop, 0, 0); @@ -248,10 +245,10 @@ static void tcg_gen_qemu_ld_i32_int(TCGv_i32 val, TCG= Temp *addr, oi =3D make_memop_idx(memop, idx); } =20 - copy_addr =3D plugin_maybe_preserve_addr(addr); - gen_ldst1(INDEX_op_qemu_ld, TCG_TYPE_I32, tcgv_i32_temp(val), addr, oi= ); - plugin_gen_mem_callbacks_i32(val, copy_addr, addr, orig_oi, - QEMU_PLUGIN_MEM_R); + ext_addr =3D maybe_extend_or_copy_addr(addr, tcgv_i32_temp(val), false= ); + gen_ldst1(INDEX_op_qemu_ld, TCG_TYPE_I32, tcgv_i32_temp(val), ext_addr= , oi); + plugin_gen_mem_callbacks_i32(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_R= ); + maybe_free_addr(addr, ext_addr); =20 if ((orig_memop ^ memop) & MO_BSWAP) { switch (orig_memop & MO_SIZE) { @@ -282,6 +279,7 @@ static void tcg_gen_qemu_st_i32_int(TCGv_i32 val, TCGTe= mp *addr, { TCGv_i32 swap =3D NULL; MemOpIdx orig_oi, oi; + TCGTemp *ext_addr; =20 tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); memop =3D tcg_canonicalize_memop(memop, 0, 1); @@ -304,8 +302,10 @@ static void tcg_gen_qemu_st_i32_int(TCGv_i32 val, TCGT= emp *addr, oi =3D make_memop_idx(memop, idx); } =20 - gen_ldst1(INDEX_op_qemu_st, TCG_TYPE_I32, tcgv_i32_temp(val), addr, oi= ); - plugin_gen_mem_callbacks_i32(val, NULL, addr, orig_oi, QEMU_PLUGIN_MEM= _W); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, false); + gen_ldst1(INDEX_op_qemu_st, TCG_TYPE_I32, tcgv_i32_temp(val), ext_addr= , oi); + plugin_gen_mem_callbacks_i32(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_W= ); + maybe_free_addr(addr, ext_addr); =20 if (swap) { tcg_temp_free_i32(swap); @@ -325,7 +325,7 @@ static void tcg_gen_qemu_ld_i64_int(TCGv_i64 val, TCGTe= mp *addr, { MemOp orig_memop; MemOpIdx orig_oi, oi; - TCGv_i64 copy_addr; + TCGTemp *ext_addr; =20 if (TCG_TARGET_REG_BITS =3D=3D 32 && (memop & MO_SIZE) < MO_64) { tcg_gen_qemu_ld_i32_int(TCGV_LOW(val), addr, idx, memop); @@ -350,10 +350,10 @@ static void tcg_gen_qemu_ld_i64_int(TCGv_i64 val, TCG= Temp *addr, oi =3D make_memop_idx(memop, idx); } =20 - copy_addr =3D plugin_maybe_preserve_addr(addr); - gen_ld_i64(val, addr, oi); - plugin_gen_mem_callbacks_i64(val, copy_addr, addr, orig_oi, - QEMU_PLUGIN_MEM_R); + ext_addr =3D maybe_extend_or_copy_addr(addr, tcgv_i64_temp(val), false= ); + gen_ld_i64(val, ext_addr, oi); + plugin_gen_mem_callbacks_i64(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_R= ); + maybe_free_addr(addr, ext_addr); =20 if ((orig_memop ^ memop) & MO_BSWAP) { int flags =3D (orig_memop & MO_SIGN @@ -388,6 +388,7 @@ static void tcg_gen_qemu_st_i64_int(TCGv_i64 val, TCGTe= mp *addr, { TCGv_i64 swap =3D NULL; MemOpIdx orig_oi, oi; + TCGTemp *ext_addr; =20 if (TCG_TARGET_REG_BITS =3D=3D 32 && (memop & MO_SIZE) < MO_64) { tcg_gen_qemu_st_i32_int(TCGV_LOW(val), addr, idx, memop); @@ -418,8 +419,10 @@ static void tcg_gen_qemu_st_i64_int(TCGv_i64 val, TCGT= emp *addr, oi =3D make_memop_idx(memop, idx); } =20 - gen_st_i64(val, addr, oi); - plugin_gen_mem_callbacks_i64(val, NULL, addr, orig_oi, QEMU_PLUGIN_MEM= _W); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, false); + gen_st_i64(val, ext_addr, oi); + plugin_gen_mem_callbacks_i64(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_W= ); + maybe_free_addr(addr, ext_addr); =20 if (swap) { tcg_temp_free_i64(swap); @@ -508,28 +511,11 @@ static void canonicalize_memop_i128_as_i64(MemOp ret[= 2], MemOp orig) ret[1] =3D mop_2; } =20 -static TCGv_i64 maybe_extend_addr64(TCGTemp *addr) -{ - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - TCGv_i64 a64 =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(a64, temp_tcgv_i32(addr)); - return a64; - } - return temp_tcgv_i64(addr); -} - -static void maybe_free_addr64(TCGv_i64 a64) -{ - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - tcg_temp_free_i64(a64); - } -} - static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCGTemp *addr, TCGArg idx, MemOp memop) { MemOpIdx orig_oi; - TCGv_i64 ext_addr =3D NULL; + TCGTemp *ext_addr; =20 check_max_alignment(memop_alignment_bits(memop)); tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); @@ -540,6 +526,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, memop |=3D MO_ATOM_NONE; } orig_oi =3D make_memop_idx(memop, idx); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, false); =20 /* TODO: For now, force 32-bit hosts to use the helper. */ if (TCG_TARGET_HAS_qemu_ldst_i128 && TCG_TARGET_REG_BITS =3D=3D 64) { @@ -558,7 +545,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, } =20 gen_ldst2(INDEX_op_qemu_ld2, TCG_TYPE_I128, tcgv_i64_temp(lo), - tcgv_i64_temp(hi), addr, oi); + tcgv_i64_temp(hi), ext_addr, oi); =20 if (need_bswap) { tcg_gen_bswap64_i64(lo, lo); @@ -566,7 +553,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, } } else if (use_two_i64_for_i128(memop)) { MemOp mop[2]; - TCGTemp *addr_p8; + TCGTemp *addr_p8, *ext_addr_p8; TCGv_i64 x, y; bool need_bswap; =20 @@ -586,7 +573,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, y =3D TCGV128_LOW(val); } =20 - gen_ld_i64(x, addr, make_memop_idx(mop[0], idx)); + gen_ld_i64(x, ext_addr, make_memop_idx(mop[0], idx)); =20 if (need_bswap) { tcg_gen_bswap64_i64(x, x); @@ -601,25 +588,25 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, T= CGTemp *addr, tcg_gen_addi_i64(t, temp_tcgv_i64(addr), 8); addr_p8 =3D tcgv_i64_temp(t); } + ext_addr_p8 =3D maybe_extend_or_copy_addr(addr_p8, NULL, false); =20 gen_ld_i64(y, addr_p8, make_memop_idx(mop[1], idx)); + maybe_free_addr(addr_p8, ext_addr_p8); tcg_temp_free_internal(addr_p8); =20 if (need_bswap) { tcg_gen_bswap64_i64(y, y); } } else { - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - ext_addr =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(ext_addr, temp_tcgv_i32(addr)); - addr =3D tcgv_i64_temp(ext_addr); + if (ext_addr =3D=3D addr) { + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); } - gen_helper_ld_i128(val, tcg_env, temp_tcgv_i64(addr), + gen_helper_ld_i128(val, tcg_env, temp_tcgv_i64(ext_addr), tcg_constant_i32(orig_oi)); } =20 - plugin_gen_mem_callbacks_i128(val, ext_addr, addr, orig_oi, - QEMU_PLUGIN_MEM_R); + plugin_gen_mem_callbacks_i128(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_= R); + maybe_free_addr(addr, ext_addr); } =20 void tcg_gen_qemu_ld_i128_chk(TCGv_i128 val, TCGTemp *addr, TCGArg idx, @@ -635,7 +622,7 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCG= Temp *addr, TCGArg idx, MemOp memop) { MemOpIdx orig_oi; - TCGv_i64 ext_addr =3D NULL; + TCGTemp *ext_addr; =20 check_max_alignment(memop_alignment_bits(memop)); tcg_gen_req_mo(TCG_MO_ST_LD | TCG_MO_ST_ST); @@ -646,6 +633,7 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCG= Temp *addr, memop |=3D MO_ATOM_NONE; } orig_oi =3D make_memop_idx(memop, idx); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, false); =20 /* TODO: For now, force 32-bit hosts to use the helper. */ =20 @@ -667,7 +655,7 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCG= Temp *addr, } =20 gen_ldst2(INDEX_op_qemu_st2, TCG_TYPE_I128, - tcgv_i64_temp(lo), tcgv_i64_temp(hi), addr, oi); + tcgv_i64_temp(lo), tcgv_i64_temp(hi), ext_addr, oi); =20 if (need_bswap) { tcg_temp_free_i64(lo); @@ -675,7 +663,7 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCG= Temp *addr, } } else if (use_two_i64_for_i128(memop)) { MemOp mop[2]; - TCGTemp *addr_p8; + TCGTemp *addr_p8, *ext_addr_p8; TCGv_i64 x, y, b =3D NULL; =20 canonicalize_memop_i128_as_i64(mop, memop); @@ -705,27 +693,27 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, T= CGTemp *addr, tcg_gen_addi_i64(t, temp_tcgv_i64(addr), 8); addr_p8 =3D tcgv_i64_temp(t); } + ext_addr_p8 =3D maybe_extend_or_copy_addr(addr_p8, NULL, false); =20 if (b) { tcg_gen_bswap64_i64(b, y); - gen_st_i64(b, addr_p8, make_memop_idx(mop[1], idx)); + gen_st_i64(b, ext_addr_p8, make_memop_idx(mop[1], idx)); tcg_temp_free_i64(b); } else { - gen_st_i64(y, addr_p8, make_memop_idx(mop[1], idx)); + gen_st_i64(y, ext_addr_p8, make_memop_idx(mop[1], idx)); } + maybe_free_addr(addr_p8, ext_addr_p8); tcg_temp_free_internal(addr_p8); } else { - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - ext_addr =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(ext_addr, temp_tcgv_i32(addr)); - addr =3D tcgv_i64_temp(ext_addr); + if (ext_addr =3D=3D addr) { + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); } - gen_helper_st_i128(tcg_env, temp_tcgv_i64(addr), val, + gen_helper_st_i128(tcg_env, temp_tcgv_i64(ext_addr), val, tcg_constant_i32(orig_oi)); } =20 - plugin_gen_mem_callbacks_i128(val, ext_addr, addr, orig_oi, - QEMU_PLUGIN_MEM_W); + plugin_gen_mem_callbacks_i128(val, ext_addr, orig_oi, QEMU_PLUGIN_MEM_= W); + maybe_free_addr(addr, ext_addr); } =20 void tcg_gen_qemu_st_i128_chk(TCGv_i128 val, TCGTemp *addr, TCGArg idx, @@ -864,7 +852,7 @@ static void tcg_gen_atomic_cmpxchg_i32_int(TCGv_i32 ret= v, TCGTemp *addr, TCGArg idx, MemOp memop) { gen_atomic_cx_i32 gen; - TCGv_i64 a64; + TCGTemp *ext_addr; MemOpIdx oi; =20 if (!(tcg_ctx->gen_tb->cflags & CF_PARALLEL)) { @@ -877,9 +865,10 @@ static void tcg_gen_atomic_cmpxchg_i32_int(TCGv_i32 re= tv, TCGTemp *addr, tcg_debug_assert(gen !=3D NULL); =20 oi =3D make_memop_idx(memop & ~MO_SIGN, idx); - a64 =3D maybe_extend_addr64(addr); - gen(retv, tcg_env, a64, cmpv, newv, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); + gen(retv, tcg_env, temp_tcgv_i64(ext_addr), + cmpv, newv, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); =20 if (memop & MO_SIGN) { tcg_gen_ext_i32(retv, retv, memop); @@ -957,9 +946,10 @@ static void tcg_gen_atomic_cmpxchg_i64_int(TCGv_i64 re= tv, TCGTemp *addr, gen =3D table_cmpxchg[memop & (MO_SIZE | MO_BSWAP)]; if (gen) { MemOpIdx oi =3D make_memop_idx(memop, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); - gen(retv, tcg_env, a64, cmpv, newv, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, tr= ue); + gen(retv, tcg_env, temp_tcgv_i64(ext_addr), + cmpv, newv, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); return; } =20 @@ -1019,11 +1009,11 @@ static void tcg_gen_nonatomic_cmpxchg_i128_int(TCGv= _i128 retv, TCGTemp *addr, if (TCG_TARGET_REG_BITS =3D=3D 32) { /* Inline expansion below is simply too large for 32-bit hosts. */ MemOpIdx oi =3D make_memop_idx(memop, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); =20 - gen_helper_nonatomic_cmpxchgo(retv, tcg_env, a64, cmpv, newv, - tcg_constant_i32(oi)); - maybe_free_addr64(a64); + gen_helper_nonatomic_cmpxchgo(retv, tcg_env, temp_tcgv_i64(ext_add= r), + cmpv, newv, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); } else { TCGv_i128 oldv =3D tcg_temp_ebb_new_i128(); TCGv_i128 tmpv =3D tcg_temp_ebb_new_i128(); @@ -1079,9 +1069,10 @@ static void tcg_gen_atomic_cmpxchg_i128_int(TCGv_i12= 8 retv, TCGTemp *addr, gen =3D table_cmpxchg[memop & (MO_SIZE | MO_BSWAP)]; if (gen) { MemOpIdx oi =3D make_memop_idx(memop, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); - gen(retv, tcg_env, a64, cmpv, newv, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); + gen(retv, tcg_env, temp_tcgv_i64(ext_addr), + cmpv, newv, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); return; } =20 @@ -1129,7 +1120,7 @@ static void do_atomic_op_i32(TCGv_i32 ret, TCGTemp *a= ddr, TCGv_i32 val, TCGArg idx, MemOp memop, void * const table[]) { gen_atomic_op_i32 gen; - TCGv_i64 a64; + TCGTemp *ext_addr; MemOpIdx oi; =20 memop =3D tcg_canonicalize_memop(memop, 0, 0); @@ -1138,9 +1129,9 @@ static void do_atomic_op_i32(TCGv_i32 ret, TCGTemp *a= ddr, TCGv_i32 val, tcg_debug_assert(gen !=3D NULL); =20 oi =3D make_memop_idx(memop & ~MO_SIGN, idx); - a64 =3D maybe_extend_addr64(addr); - gen(ret, tcg_env, a64, val, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); + gen(ret, tcg_env, temp_tcgv_i64(ext_addr), val, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); =20 if (memop & MO_SIGN) { tcg_gen_ext_i32(ret, ret, memop); @@ -1176,9 +1167,10 @@ static void do_atomic_op_i64(TCGv_i64 ret, TCGTemp *= addr, TCGv_i64 val, =20 if (gen) { MemOpIdx oi =3D make_memop_idx(memop & ~MO_SIGN, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); - gen(ret, tcg_env, a64, val, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, tr= ue); + gen(ret, tcg_env, temp_tcgv_i64(ext_addr), + val, tcg_constant_i32(oi)); + maybe_free_addr(addr, ext_addr); return; } =20 @@ -1227,9 +1219,9 @@ static void do_atomic_op_i128(TCGv_i128 ret, TCGTemp = *addr, TCGv_i128 val, =20 if (gen) { MemOpIdx oi =3D make_memop_idx(memop & ~MO_SIGN, idx); - TCGv_i64 a64 =3D maybe_extend_addr64(addr); - gen(ret, tcg_env, a64, val, tcg_constant_i32(oi)); - maybe_free_addr64(a64); + TCGTemp *ext_addr =3D maybe_extend_or_copy_addr(addr, NULL, true); + gen(ret, tcg_env, temp_tcgv_i64(ext_addr), val, tcg_constant_i32(o= i)); + maybe_free_addr(addr, ext_addr); return; } =20 --=20 2.43.0 From nobody Mon Feb 9 20:41:03 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 176470535893492.99527090675099; Tue, 2 Dec 2025 11:55:58 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vQWTQ-0005bc-1B; Tue, 02 Dec 2025 14:55:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vQWTO-0005Zo-SL for qemu-devel@nongnu.org; Tue, 02 Dec 2025 14:55:42 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vQWTN-0008TK-7u for qemu-devel@nongnu.org; Tue, 02 Dec 2025 14:55:42 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-42b3669ca3dso2631893f8f.0 for ; Tue, 02 Dec 2025 11:55:40 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42e1ca40945sm35613569f8f.30.2025.12.02.11.55.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 02 Dec 2025 11:55:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1764705339; x=1765310139; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hxc/QIJQZ6T/2cx2wh2nq/a8IHvHh76nxiM/CVeu2Hs=; b=otaNL9S4CmV/CXyYZqG9E1e+3QpiAUyJ2ppf1INfeTG5nRdavm62gj0ckiF9LbAGfE ydZB6NWpuRm4YqUIUsQNioBhQOm1LK+23Tz6g9hof3INSBD714hthLss5P4CaCD8h6nU Eygi7/piqNaNxpX4aUTLKNcy+4VIR1SjZSaghW9R23q5CpA1FJTB2YjnKqCXqRJwA8EQ 7PpWhZr8yrpAmEsbv+sbYC7j/ldfsNMnRaP7NJr+7ov5Fo/6OltuyH+ex4Bb2cCo6qyg ijx0XW7xgCnGDtZo+4IgCr1HP+Uet9rHgUqglOOnIA4Ccol/ymWv3ZF5i06v94+p+vl2 cVhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764705339; x=1765310139; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=hxc/QIJQZ6T/2cx2wh2nq/a8IHvHh76nxiM/CVeu2Hs=; b=U1STYpkus2QEPhgWxxL6DFSMXJOsOxb6VdF70krNmBTII3PMyQh3H0AEtkWjtD6pa/ lWgPD8HmbwboYe+arUYb3SMcj20cSbUmVp6OQkzM3ZtXZCIiQSuPWRT7XYhimwupiCWR XczFc7aN0/P3wXCPytGUyRnOk0BzIF19WQljahC2vWaY6XGYwD4fWN8pG2FK+xokO9tr xpJtATm6590c6qSyXHr8/blmdDXnxlfFKmwlJelYgwkAmdrABbOfwG3g1Lb16KHwZEKS oDgPCYbaApkjp/en3YP9dGblg1wI9J0YxMxscL2WMQ3JKAlKOYr484n5O3xKL1TJ+F3n /Wjg== X-Gm-Message-State: AOJu0YwU6p23hC3H3Z2TdhU4lb+5aZ55Esbwq3sUf3o5vjKvTcjJM/aB 4HmfNGdkPxgGK3avygbQd96wxOZbtielSEHSUSE7uj4Z66Fn79B+RTcocgnIMkFogigqiLFa8ZX Ep1w+BtY= X-Gm-Gg: ASbGnctWnfqM/yHP4ym2djdZdgxmwRVcDIwLIHOnNSQzDIDdrYdG3PeaHjR76KBWGll vS5/FiOdEiSZducC/AbcH8tUeSWUXbX/G5XtECYouFselW588aEuYk4KwImPY6Xro5tKKHvW+jJ KA6nggRaRtsm6ZBeR8GkOztitdVjc+C2LKwQ+4Z6l6XJslGuz1kDmQP+NTcXNHb9wXPvq/tzUV/ Fex8oeb+b8uJcr5XI5iqKhaG9qhkNBBHciisLIVClHiUdveXM6qQijcZiUfwmqnb4Oukg/npfQ3 Vqi8Tr5BpDDJ3nTJoYOIxoxRC0SuacUSaNXpA9yrKsPBaTLxg4hWKXe2NDd9Z2em7cMPRxHmHS+ q1EPa67uxO/8fBLulb34IMgfnEVkmuGX7StI+S6WxP2QbnHIWCuK6P1zjWMEiZLSCACfApvv1oK b4IkUX1d3J921aJFj+kWkpcrF4Q4a4iYOGw3L9/aqTPVM1BfaoqZCyhRZR3Cxd X-Google-Smtp-Source: AGHT+IHH81EOL1Fm9xPA6JuVCekNzZwRcLsVl4deBvrzIvygwEgrTEf02vtUNDWWDlfisxTBmCS30Q== X-Received: by 2002:a5d:5d84:0:b0:429:8b01:c08d with SMTP id ffacd0b85a97d-42f72235366mr398460f8f.41.1764705339029; Tue, 02 Dec 2025 11:55:39 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: alex.bennee@linaro.org, Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 1.5/2] tcg: Move maybe_{extend, free}_addr64() functions around Date: Tue, 2 Dec 2025 20:55:37 +0100 Message-ID: <20251202195537.35508-1-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251202011228.503007-1-richard.henderson@linaro.org> References: <20251202011228.503007-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1764705359870019200 In order to make the next commit slightly easier to review, move maybe_extend_addr64() and maybe_free_addr64() around. Signed-off-by: Richard Henderson Message-Id: <20251202011228.503007-3-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Alex Benn=C3=A9e --- tcg/tcg-op-ldst.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c index 67c15fd4d0d..50bb6853f6c 100644 --- a/tcg/tcg-op-ldst.c +++ b/tcg/tcg-op-ldst.c @@ -135,6 +135,16 @@ static void tcg_gen_req_mo(TCGBar type) } } =20 +static TCGv_i64 maybe_extend_addr64(TCGTemp *addr) +{ + if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { + TCGv_i64 a64 =3D tcg_temp_ebb_new_i64(); + tcg_gen_extu_i32_i64(a64, temp_tcgv_i32(addr)); + return a64; + } + return temp_tcgv_i64(addr); +} + /* Only required for loads, where value might overlap addr. */ static TCGv_i64 plugin_maybe_preserve_addr(TCGTemp *addr) { @@ -153,6 +163,13 @@ static TCGv_i64 plugin_maybe_preserve_addr(TCGTemp *ad= dr) return NULL; } =20 +static void maybe_free_addr64(TCGv_i64 a64) +{ + if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { + tcg_temp_free_i64(a64); + } +} + #ifdef CONFIG_PLUGIN static void plugin_gen_mem_callbacks(TCGv_i64 copy_addr, TCGTemp *orig_addr, MemOpIdx = oi, @@ -508,23 +525,6 @@ static void canonicalize_memop_i128_as_i64(MemOp ret[2= ], MemOp orig) ret[1] =3D mop_2; } =20 -static TCGv_i64 maybe_extend_addr64(TCGTemp *addr) -{ - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - TCGv_i64 a64 =3D tcg_temp_ebb_new_i64(); - tcg_gen_extu_i32_i64(a64, temp_tcgv_i32(addr)); - return a64; - } - return temp_tcgv_i64(addr); -} - -static void maybe_free_addr64(TCGv_i64 a64) -{ - if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { - tcg_temp_free_i64(a64); - } -} - static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCGTemp *addr, TCGArg idx, MemOp memop) { --=20 2.51.0