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Thu, 27 Nov 2025 09:19:48 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Nicholas Piggin , Chinmay Rath , qemu-ppc@nongnu.org (open list:PowerPC TCG CPUs) Subject: [RFC PATCH] target/ppc: don't overflow SR lookup with 64 bit vaddr Date: Thu, 27 Nov 2025 17:19:43 +0000 Message-ID: <20251127171943.3241635-1-alex.bennee@linaro.org> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1764264046330019200 One of the side effects of making vaddr always 64 bits is there are places where we assume it is sized to the guest. As a result a simple shift might bring in extra bits. Using extract32 stops the crash in: ./pyvenv/bin/meson test qtest-ppc/prom-env-test with TCI enabled but the test still hangs. Over to you PPC maintainers ;-) Signed-off-by: Alex Benn=C3=A9e --- target/ppc/mmu-hash32.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index 8b980a5aa90..ce9c86ceacd 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -342,7 +342,7 @@ bool ppc_hash32_xlate(PowerPCCPU *cpu, vaddr eaddr, MMU= AccessType access_type, } =20 /* 3. Look up the Segment Register */ - sr =3D env->sr[eaddr >> 28]; + sr =3D env->sr[extract32(eaddr, 28, 4)]; =20 /* 4. Handle direct store segments */ if (sr & SR32_T) { --=20 2.47.3