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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=148.163.158.5; envelope-from=saif.abrar@linux.vnet.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1764245093806019200 Content-Type: text/plain; charset="utf-8" Add properties for user specified PCI vendor, device, subsystem vendor and subsystem IDs. e.g. PCI IDs to be specified as follows: -device nvme,id_vendor=3D0xABCD,id_device=3D0xA0B0,id_subsys_vendor=3D0xEF0= 0,id_subsys=3D0xEF01 Signed-off-by: Saif Abrar --- v3 -> v4: Resolve merge commits when moving to the latest repo. hw/nvme/ctrl.c | 28 +++++++++++++++++++++++++--- hw/nvme/nvme.h | 5 +++++ 2 files changed, 30 insertions(+), 3 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index cc4593cd42..d857be5496 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -8877,7 +8877,10 @@ static bool nvme_init_sriov(NvmeCtrl *n, PCIDevice *= pci_dev, uint16_t offset, Error **errp) { uint16_t vf_dev_id =3D n->params.use_intel_id ? - PCI_DEVICE_ID_INTEL_NVME : PCI_DEVICE_ID_REDHAT_N= VME; + PCI_DEVICE_ID_INTEL_NVME : + (n->params.id_device ? + n->params.id_device : PCI_DEVICE_ID_REDHAT_NVME); + NvmePriCtrlCap *cap =3D &n->pri_ctrl_cap; uint64_t bar_size =3D nvme_mbar_size(le16_to_cpu(cap->vqfrsm), le16_to_cpu(cap->vifrsm), @@ -8953,8 +8956,22 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pc= i_dev, Error **errp) pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_NVME); } else { - pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REDHAT); - pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REDHAT_NVME); + uint16_t id_vendor =3D n->params.id_vendor ? + n->params.id_vendor : PCI_VENDOR_ID_REDHAT; + pci_config_set_vendor_id(pci_conf, id_vendor); + + uint16_t id_device =3D n->params.id_device ? + n->params.id_device : PCI_DEVICE_ID_REDHAT_NV= ME; + pci_config_set_device_id(pci_conf, id_device); + + if (n->params.id_subsys_vendor) { + pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, + n->params.id_subsys_ven= dor); + } + + if (n->params.id_subsys) { + pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, n->params.id_subsys); + } } =20 pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_EXPRESS); @@ -9409,6 +9426,11 @@ static const Property nvme_props[] =3D { DEFINE_PROP_UINT16("atomic.awun", NvmeCtrl, params.atomic_awun, 0), DEFINE_PROP_UINT16("atomic.awupf", NvmeCtrl, params.atomic_awupf, 0), DEFINE_PROP_BOOL("ocp", NvmeCtrl, params.ocp, false), + DEFINE_PROP_UINT16("id_vendor", NvmeCtrl, params.id_vendor, 0), + DEFINE_PROP_UINT16("id_device", NvmeCtrl, params.id_device, 0), + DEFINE_PROP_UINT16("id_subsys_vendor", NvmeCtrl, + params.id_subsys_vendo= r, 0), + DEFINE_PROP_UINT16("id_subsys", NvmeCtrl, params.id_subsys, 0), }; =20 static void nvme_get_smart_warning(Object *obj, Visitor *v, const char *na= me, diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h index 8f8c78c850..65fb168bc9 100644 --- a/hw/nvme/nvme.h +++ b/hw/nvme/nvme.h @@ -571,6 +571,11 @@ typedef struct NvmeParams { uint16_t atomic_awun; uint16_t atomic_awupf; bool atomic_dn; + + uint16_t id_vendor; + uint16_t id_device; + uint16_t id_subsys_vendor; + uint16_t id_subsys; } NvmeParams; =20 typedef struct NvmeCtrl { --=20 2.47.3