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Use the explicit little-endian variants. Mechanical change running: $ tgt=3Di386; \ end=3Dle; \ for op in data mmuidx_ra; do \ for ac in uw sw l q; do \ sed -i -e "s/cpu_ld${ac}_${op}/cpu_ld${ac}_${end}_${op}/" \ $(git grep -l cpu_ target/${tgt}/); \ done; for ac in w l q; do \ sed -i -e "s/cpu_st${ac}_${op}/cpu_st${ac}_${end}_${op}/" \ $(git grep -l cpu_ target/${tgt}/); \ done; done Then adapting indentation in helper_vmload() to pass checkpatch.pl. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/i386/ops_sse.h | 12 ++--- target/i386/tcg/seg_helper.h | 12 ++--- linux-user/vm86.c | 4 +- target/i386/tcg/mem_helper.c | 8 ++-- target/i386/tcg/mpx_helper.c | 28 +++++------ target/i386/tcg/seg_helper.c | 16 +++---- target/i386/tcg/system/excp_helper.c | 8 ++-- target/i386/tcg/system/svm_helper.c | 69 +++++++++++++++------------- 8 files changed, 80 insertions(+), 77 deletions(-) diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h index a2e4d480399..213db53382c 100644 --- a/target/i386/ops_sse.h +++ b/target/i386/ops_sse.h @@ -2326,7 +2326,7 @@ void glue(helper_vpmaskmovd_st, SUFFIX)(CPUX86State *= env, =20 for (i =3D 0; i < (2 << SHIFT); i++) { if (v->L(i) >> 31) { - cpu_stl_data_ra(env, a0 + i * 4, s->L(i), GETPC()); + cpu_stl_le_data_ra(env, a0 + i * 4, s->L(i), GETPC()); } } } @@ -2338,7 +2338,7 @@ void glue(helper_vpmaskmovq_st, SUFFIX)(CPUX86State *= env, =20 for (i =3D 0; i < (1 << SHIFT); i++) { if (v->Q(i) >> 63) { - cpu_stq_data_ra(env, a0 + i * 8, s->Q(i), GETPC()); + cpu_stq_le_data_ra(env, a0 + i * 8, s->Q(i), GETPC()); } } } @@ -2369,7 +2369,7 @@ void glue(helper_vpgatherdd, SUFFIX)(CPUX86State *env, if (v->L(i) >> 31) { target_ulong addr =3D a0 + ((target_ulong)(int32_t)s->L(i) << scale); - d->L(i) =3D cpu_ldl_data_ra(env, addr, GETPC()); + d->L(i) =3D cpu_ldl_le_data_ra(env, addr, GETPC()); } v->L(i) =3D 0; } @@ -2383,7 +2383,7 @@ void glue(helper_vpgatherdq, SUFFIX)(CPUX86State *env, if (v->Q(i) >> 63) { target_ulong addr =3D a0 + ((target_ulong)(int32_t)s->L(i) << scale); - d->Q(i) =3D cpu_ldq_data_ra(env, addr, GETPC()); + d->Q(i) =3D cpu_ldq_le_data_ra(env, addr, GETPC()); } v->Q(i) =3D 0; } @@ -2397,7 +2397,7 @@ void glue(helper_vpgatherqd, SUFFIX)(CPUX86State *env, if (v->L(i) >> 31) { target_ulong addr =3D a0 + ((target_ulong)(int64_t)s->Q(i) << scale); - d->L(i) =3D cpu_ldl_data_ra(env, addr, GETPC()); + d->L(i) =3D cpu_ldl_le_data_ra(env, addr, GETPC()); } v->L(i) =3D 0; } @@ -2415,7 +2415,7 @@ void glue(helper_vpgatherqq, SUFFIX)(CPUX86State *env, if (v->Q(i) >> 63) { target_ulong addr =3D a0 + ((target_ulong)(int64_t)s->Q(i) << scale); - d->Q(i) =3D cpu_ldq_data_ra(env, addr, GETPC()); + d->Q(i) =3D cpu_ldq_le_data_ra(env, addr, GETPC()); } v->Q(i) =3D 0; } diff --git a/target/i386/tcg/seg_helper.h b/target/i386/tcg/seg_helper.h index ea98e1a98ed..20ce47d62d9 100644 --- a/target/i386/tcg/seg_helper.h +++ b/target/i386/tcg/seg_helper.h @@ -40,18 +40,18 @@ int cpu_mmu_index_kernel(CPUX86State *env); * and use *_mmuidx_ra directly. */ #define cpu_lduw_kernel_ra(e, p, r) \ - cpu_lduw_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) + cpu_lduw_le_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) #define cpu_ldl_kernel_ra(e, p, r) \ - cpu_ldl_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) + cpu_ldl_le_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) #define cpu_ldq_kernel_ra(e, p, r) \ - cpu_ldq_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) + cpu_ldq_le_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) =20 #define cpu_stw_kernel_ra(e, p, v, r) \ - cpu_stw_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) + cpu_stw_le_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) #define cpu_stl_kernel_ra(e, p, v, r) \ - cpu_stl_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) + cpu_stl_le_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) #define cpu_stq_kernel_ra(e, p, v, r) \ - cpu_stq_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) + cpu_stq_le_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) =20 #define cpu_lduw_kernel(e, p) cpu_lduw_kernel_ra(e, p, 0) #define cpu_ldl_kernel(e, p) cpu_ldl_kernel_ra(e, p, 0) diff --git a/linux-user/vm86.c b/linux-user/vm86.c index 5091d53fb84..4e120875a06 100644 --- a/linux-user/vm86.c +++ b/linux-user/vm86.c @@ -44,7 +44,7 @@ static inline int is_revectored(int nr, struct target_rev= ectored_struct *bitmap) static inline void vm_putw(CPUX86State *env, uint32_t segptr, unsigned int reg16, unsigned int val) { - cpu_stw_data(env, segptr + (reg16 & 0xffff), val); + cpu_stw_le_data(env, segptr + (reg16 & 0xffff), val); } =20 void save_v86_state(CPUX86State *env) @@ -157,7 +157,7 @@ static void do_int(CPUX86State *env, int intno) &ts->vm86plus.int21_revectored)) goto cannot_handle; int_addr =3D (intno << 2); - segoffs =3D cpu_ldl_data(env, int_addr); + segoffs =3D cpu_ldl_le_data(env, int_addr); if ((segoffs >> 16) =3D=3D TARGET_BIOSSEG) goto cannot_handle; LOG_VM86("VM86: emulating int 0x%x. CS:IP=3D%04x:%04x\n", diff --git a/target/i386/tcg/mem_helper.c b/target/i386/tcg/mem_helper.c index 9e7c2d80293..c15a32d60ad 100644 --- a/target/i386/tcg/mem_helper.c +++ b/target/i386/tcg/mem_helper.c @@ -30,8 +30,8 @@ void helper_boundw(CPUX86State *env, target_ulong a0, int= v) { int low, high; =20 - low =3D cpu_ldsw_data_ra(env, a0, GETPC()); - high =3D cpu_ldsw_data_ra(env, a0 + 2, GETPC()); + low =3D cpu_ldsw_le_data_ra(env, a0, GETPC()); + high =3D cpu_ldsw_le_data_ra(env, a0 + 2, GETPC()); v =3D (int16_t)v; if (v < low || v > high) { if (env->hflags & HF_MPX_EN_MASK) { @@ -45,8 +45,8 @@ void helper_boundl(CPUX86State *env, target_ulong a0, int= v) { int low, high; =20 - low =3D cpu_ldl_data_ra(env, a0, GETPC()); - high =3D cpu_ldl_data_ra(env, a0 + 4, GETPC()); + low =3D cpu_ldl_le_data_ra(env, a0, GETPC()); + high =3D cpu_ldl_le_data_ra(env, a0 + 4, GETPC()); if (v < low || v > high) { if (env->hflags & HF_MPX_EN_MASK) { env->bndcs_regs.sts =3D 0; diff --git a/target/i386/tcg/mpx_helper.c b/target/i386/tcg/mpx_helper.c index fa8abcc4820..73d33bf5e4a 100644 --- a/target/i386/tcg/mpx_helper.c +++ b/target/i386/tcg/mpx_helper.c @@ -44,7 +44,7 @@ static uint64_t lookup_bte64(CPUX86State *env, uint64_t b= ase, uintptr_t ra) } =20 bde =3D (extract64(base, 20, 28) << 3) + (extract64(bndcsr, 20, 44) <<= 12); - bt =3D cpu_ldq_data_ra(env, bde, ra); + bt =3D cpu_ldq_le_data_ra(env, bde, ra); if ((bt & 1) =3D=3D 0) { env->bndcs_regs.sts =3D bde | 2; raise_exception_ra(env, EXCP05_BOUND, ra); @@ -64,7 +64,7 @@ static uint32_t lookup_bte32(CPUX86State *env, uint32_t b= ase, uintptr_t ra) } =20 bde =3D (extract32(base, 12, 20) << 2) + (bndcsr & TARGET_PAGE_MASK); - bt =3D cpu_ldl_data_ra(env, bde, ra); + bt =3D cpu_ldl_le_data_ra(env, bde, ra); if ((bt & 1) =3D=3D 0) { env->bndcs_regs.sts =3D bde | 2; raise_exception_ra(env, EXCP05_BOUND, ra); @@ -79,9 +79,9 @@ uint64_t helper_bndldx64(CPUX86State *env, target_ulong b= ase, target_ulong ptr) uint64_t bte, lb, ub, pt; =20 bte =3D lookup_bte64(env, base, ra); - lb =3D cpu_ldq_data_ra(env, bte, ra); - ub =3D cpu_ldq_data_ra(env, bte + 8, ra); - pt =3D cpu_ldq_data_ra(env, bte + 16, ra); + lb =3D cpu_ldq_le_data_ra(env, bte, ra); + ub =3D cpu_ldq_le_data_ra(env, bte + 8, ra); + pt =3D cpu_ldq_le_data_ra(env, bte + 16, ra); =20 if (pt !=3D ptr) { lb =3D ub =3D 0; @@ -96,9 +96,9 @@ uint64_t helper_bndldx32(CPUX86State *env, target_ulong b= ase, target_ulong ptr) uint32_t bte, lb, ub, pt; =20 bte =3D lookup_bte32(env, base, ra); - lb =3D cpu_ldl_data_ra(env, bte, ra); - ub =3D cpu_ldl_data_ra(env, bte + 4, ra); - pt =3D cpu_ldl_data_ra(env, bte + 8, ra); + lb =3D cpu_ldl_le_data_ra(env, bte, ra); + ub =3D cpu_ldl_le_data_ra(env, bte + 4, ra); + pt =3D cpu_ldl_le_data_ra(env, bte + 8, ra); =20 if (pt !=3D ptr) { lb =3D ub =3D 0; @@ -113,9 +113,9 @@ void helper_bndstx64(CPUX86State *env, target_ulong bas= e, target_ulong ptr, uint64_t bte; =20 bte =3D lookup_bte64(env, base, ra); - cpu_stq_data_ra(env, bte, lb, ra); - cpu_stq_data_ra(env, bte + 8, ub, ra); - cpu_stq_data_ra(env, bte + 16, ptr, ra); + cpu_stq_le_data_ra(env, bte, lb, ra); + cpu_stq_le_data_ra(env, bte + 8, ub, ra); + cpu_stq_le_data_ra(env, bte + 16, ptr, ra); } =20 void helper_bndstx32(CPUX86State *env, target_ulong base, target_ulong ptr, @@ -125,9 +125,9 @@ void helper_bndstx32(CPUX86State *env, target_ulong bas= e, target_ulong ptr, uint32_t bte; =20 bte =3D lookup_bte32(env, base, ra); - cpu_stl_data_ra(env, bte, lb, ra); - cpu_stl_data_ra(env, bte + 4, ub, ra); - cpu_stl_data_ra(env, bte + 8, ptr, ra); + cpu_stl_le_data_ra(env, bte, lb, ra); + cpu_stl_le_data_ra(env, bte + 4, ub, ra); + cpu_stl_le_data_ra(env, bte + 8, ptr, ra); } =20 void helper_bnd_jmp(CPUX86State *env) diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index 227336c4ef2..58aac720119 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -65,20 +65,20 @@ typedef struct StackAccess static void pushw(StackAccess *sa, uint16_t val) { sa->sp -=3D 2; - cpu_stw_mmuidx_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), + cpu_stw_le_mmuidx_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), val, sa->mmu_index, sa->ra); } =20 static void pushl(StackAccess *sa, uint32_t val) { sa->sp -=3D 4; - cpu_stl_mmuidx_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), + cpu_stl_le_mmuidx_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), val, sa->mmu_index, sa->ra); } =20 static uint16_t popw(StackAccess *sa) { - uint16_t ret =3D cpu_lduw_mmuidx_ra(sa->env, + uint16_t ret =3D cpu_lduw_le_mmuidx_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), sa->mmu_index, sa->ra); sa->sp +=3D 2; @@ -87,7 +87,7 @@ static uint16_t popw(StackAccess *sa) =20 static uint32_t popl(StackAccess *sa) { - uint32_t ret =3D cpu_ldl_mmuidx_ra(sa->env, + uint32_t ret =3D cpu_ldl_le_mmuidx_ra(sa->env, sa->ss_base + (sa->sp & sa->sp_mask), sa->mmu_index, sa->ra); sa->sp +=3D 4; @@ -905,12 +905,12 @@ static void do_interrupt_protected(CPUX86State *env, = int intno, int is_int, static void pushq(StackAccess *sa, uint64_t val) { sa->sp -=3D 8; - cpu_stq_mmuidx_ra(sa->env, sa->sp, val, sa->mmu_index, sa->ra); + cpu_stq_le_mmuidx_ra(sa->env, sa->sp, val, sa->mmu_index, sa->ra); } =20 static uint64_t popq(StackAccess *sa) { - uint64_t ret =3D cpu_ldq_mmuidx_ra(sa->env, sa->sp, sa->mmu_index, sa-= >ra); + uint64_t ret =3D cpu_ldq_le_mmuidx_ra(sa->env, sa->sp, sa->mmu_index, = sa->ra); sa->sp +=3D 8; return ret; } @@ -1887,7 +1887,7 @@ void helper_lcall_protected(CPUX86State *env, int new= _cs, target_ulong new_eip, pushl(&sa, env->segs[R_SS].selector); pushl(&sa, env->regs[R_ESP]); for (i =3D param_count - 1; i >=3D 0; i--) { - val =3D cpu_ldl_data_ra(env, + val =3D cpu_ldl_le_data_ra(env, old_ssp + ((env->regs[R_ESP] + i= * 4) & old_sp_mask), GETPC()); pushl(&sa, val); @@ -1896,7 +1896,7 @@ void helper_lcall_protected(CPUX86State *env, int new= _cs, target_ulong new_eip, pushw(&sa, env->segs[R_SS].selector); pushw(&sa, env->regs[R_ESP]); for (i =3D param_count - 1; i >=3D 0; i--) { - val =3D cpu_lduw_data_ra(env, + val =3D cpu_lduw_le_data_ra(env, old_ssp + ((env->regs[R_ESP] + = i * 2) & old_sp_mask), GETPC()); pushw(&sa, val); diff --git a/target/i386/tcg/system/excp_helper.c b/target/i386/tcg/system/= excp_helper.c index f622b5d588e..d7ea77c8558 100644 --- a/target/i386/tcg/system/excp_helper.c +++ b/target/i386/tcg/system/excp_helper.c @@ -90,7 +90,7 @@ static inline uint32_t ptw_ldl(const PTETranslate *in, ui= nt64_t ra) if (likely(in->haddr)) { return ldl_p(in->haddr); } - return cpu_ldl_mmuidx_ra(in->env, in->gaddr, in->ptw_idx, ra); + return cpu_ldl_le_mmuidx_ra(in->env, in->gaddr, in->ptw_idx, ra); } =20 static inline uint64_t ptw_ldq(const PTETranslate *in, uint64_t ra) @@ -98,7 +98,7 @@ static inline uint64_t ptw_ldq(const PTETranslate *in, ui= nt64_t ra) if (likely(in->haddr)) { return ldq_p(in->haddr); } - return cpu_ldq_mmuidx_ra(in->env, in->gaddr, in->ptw_idx, ra); + return cpu_ldq_le_mmuidx_ra(in->env, in->gaddr, in->ptw_idx, ra); } =20 /* @@ -116,9 +116,9 @@ static bool ptw_setl_slow(const PTETranslate *in, uint3= 2_t old, uint32_t new) cpu_exec_end(cpu); /* Does x86 really perform a rmw cycle on mmio for ptw? */ start_exclusive(); - cmp =3D cpu_ldl_mmuidx_ra(in->env, in->gaddr, in->ptw_idx, 0); + cmp =3D cpu_ldl_le_mmuidx_ra(in->env, in->gaddr, in->ptw_idx, 0); if (cmp =3D=3D old) { - cpu_stl_mmuidx_ra(in->env, in->gaddr, new, in->ptw_idx, 0); + cpu_stl_le_mmuidx_ra(in->env, in->gaddr, new, in->ptw_idx, 0); } end_exclusive(); cpu_exec_start(cpu); diff --git a/target/i386/tcg/system/svm_helper.c b/target/i386/tcg/system/s= vm_helper.c index 4b86796518f..3e236094d6f 100644 --- a/target/i386/tcg/system/svm_helper.c +++ b/target/i386/tcg/system/svm_helper.c @@ -30,13 +30,13 @@ static void svm_save_seg(CPUX86State *env, int mmu_idx, hwaddr addr, const SegmentCache *sc) { - cpu_stw_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, selector), + cpu_stw_le_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, selector), sc->selector, mmu_idx, 0); - cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, base), + cpu_stq_le_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, base), sc->base, mmu_idx, 0); - cpu_stl_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, limit), + cpu_stl_le_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, limit), sc->limit, mmu_idx, 0); - cpu_stw_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, attrib), + cpu_stw_le_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, attrib), ((sc->flags >> 8) & 0xff) | ((sc->flags >> 12) & 0x0f00), mmu_idx, 0); @@ -58,16 +58,16 @@ static void svm_load_seg(CPUX86State *env, int mmu_idx,= hwaddr addr, unsigned int flags; =20 sc->selector =3D - cpu_lduw_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, selector), + cpu_lduw_le_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, select= or), mmu_idx, 0); sc->base =3D - cpu_ldq_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, base), + cpu_ldq_le_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, base), mmu_idx, 0); sc->limit =3D - cpu_ldl_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, limit), + cpu_ldl_le_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, limit), mmu_idx, 0); flags =3D - cpu_lduw_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, attrib), + cpu_lduw_le_mmuidx_ra(env, addr + offsetof(struct vmcb_seg, attrib= ), mmu_idx, 0); sc->flags =3D ((flags & 0xff) << 8) | ((flags & 0x0f00) << 12); =20 @@ -507,32 +507,35 @@ void helper_vmload(CPUX86State *env, int aflag) =20 #ifdef TARGET_X86_64 env->kernelgsbase =3D - cpu_ldq_mmuidx_ra(env, - addr + offsetof(struct vmcb, save.kernel_gs_base= ), - mmu_idx, 0); + cpu_ldq_le_mmuidx_ra(env, + addr + offsetof(struct vmcb, save.kernel_gs_b= ase), + mmu_idx, 0); env->lstar =3D - cpu_ldq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.lstar), - mmu_idx, 0); + cpu_ldq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.lstar), + mmu_idx, 0); env->cstar =3D - cpu_ldq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.cstar), - mmu_idx, 0); + cpu_ldq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.cstar), + mmu_idx, 0); env->fmask =3D - cpu_ldq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sfmask), - mmu_idx, 0); + cpu_ldq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sfmask= ), + mmu_idx, 0); svm_canonicalization(env, &env->kernelgsbase); #endif env->star =3D - cpu_ldq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.star), - mmu_idx, 0); + cpu_ldq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.star), + mmu_idx, 0); env->sysenter_cs =3D - cpu_ldq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sysenter_= cs), - mmu_idx, 0); + cpu_ldq_le_mmuidx_ra(env, + addr + offsetof(struct vmcb, save.sysenter_cs= ), + mmu_idx, 0); env->sysenter_esp =3D - cpu_ldq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sysenter_= esp), - mmu_idx, 0); + cpu_ldq_le_mmuidx_ra(env, + addr + offsetof(struct vmcb, save.sysenter_es= p), + mmu_idx, 0); env->sysenter_eip =3D - cpu_ldq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sysenter_= eip), - mmu_idx, 0); + cpu_ldq_le_mmuidx_ra(env, + addr + offsetof(struct vmcb, save.sysenter_ei= p), + mmu_idx, 0); } =20 void helper_vmsave(CPUX86State *env, int aflag) @@ -567,22 +570,22 @@ void helper_vmsave(CPUX86State *env, int aflag) &env->ldt); =20 #ifdef TARGET_X86_64 - cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.kernel_gs_bas= e), + cpu_stq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.kernel_gs_= base), env->kernelgsbase, mmu_idx, 0); - cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.lstar), + cpu_stq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.lstar), env->lstar, mmu_idx, 0); - cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.cstar), + cpu_stq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.cstar), env->cstar, mmu_idx, 0); - cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sfmask), + cpu_stq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sfmask), env->fmask, mmu_idx, 0); #endif - cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.star), + cpu_stq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.star), env->star, mmu_idx, 0); - cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sysenter_cs), + cpu_stq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sysenter_c= s), env->sysenter_cs, mmu_idx, 0); - cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sysenter_esp), + cpu_stq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sysenter_e= sp), env->sysenter_esp, mmu_idx, 0); - cpu_stq_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sysenter_eip), + cpu_stq_le_mmuidx_ra(env, addr + offsetof(struct vmcb, save.sysenter_e= ip), env->sysenter_eip, mmu_idx, 0); } =20 --=20 2.51.0