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Use it to check the address alignment. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/tcg/ldst_helper.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c index 013cd825dac..bef384575c2 100644 --- a/target/mips/tcg/ldst_helper.c +++ b/target/mips/tcg/ldst_helper.c @@ -29,12 +29,14 @@ =20 #ifndef CONFIG_USER_ONLY =20 -#define HELPER_LD_ATOMIC(name, almask, cpu_load) = \ +#define HELPER_LD_ATOMIC(name, cpu_load) = \ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int memop_= idx)\ { = \ MemOpIdx oi =3D memop_idx; = \ unsigned mem_idx =3D get_mmuidx(oi); = \ - if (arg & almask) { = \ + MemOp op =3D get_memop(oi); = \ + unsigned size =3D memop_size(op); = \ + if (arg & (size - 1)) { = \ if (!(env->hflags & MIPS_HFLAG_DM)) { = \ env->CP0_BadVAddr =3D arg; = \ } = \ @@ -52,14 +54,14 @@ static target_ulong loads4(CPUMIPSState *env, target_ul= ong arg, { return (target_long)(int32_t)cpu_ldl_mmuidx_ra(env, arg, mem_idx, ra); } -HELPER_LD_ATOMIC(ll, 0x3, loads4) +HELPER_LD_ATOMIC(ll, loads4) #ifdef TARGET_MIPS64 static target_ulong loadu8(CPUMIPSState *env, target_ulong arg, unsigned mem_idx, uintptr_t ra) { return (target_ulong)cpu_ldq_mmuidx_ra(env, arg, mem_idx, ra); } -HELPER_LD_ATOMIC(lld, 0x7, loadu8) +HELPER_LD_ATOMIC(lld, loadu8) #endif #undef HELPER_LD_ATOMIC =20 --=20 2.51.0