From nobody Tue Feb 10 09:10:59 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1763783502431649.9907871520891; Fri, 21 Nov 2025 19:51:42 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vMd6W-0004MK-M2; Fri, 21 Nov 2025 21:12:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vMchS-0007Uv-9B; Fri, 21 Nov 2025 20:46:06 -0500 Received: from isrv.corpit.ru ([212.248.84.144]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vMcfP-00042j-O9; Fri, 21 Nov 2025 20:46:02 -0500 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 9DCF616CA41; Fri, 21 Nov 2025 21:44:20 +0300 (MSK) Received: from think4mjt.tls.msk.ru (mjtthink.wg.tls.msk.ru [192.168.177.146]) by tsrv.corpit.ru (Postfix) with ESMTP id 2629B321C7D; Fri, 21 Nov 2025 21:44:29 +0300 (MSK) From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Jialong Yang , Alistair Francis , Michael Tokarev Subject: [Stable-10.0.7 06/81] aplic: fix mask for smsiaddrcfgh Date: Fri, 21 Nov 2025 21:43:05 +0300 Message-ID: <20251121184424.1137669-6-mjt@tls.msk.ru> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=212.248.84.144; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1763783503224018900 Content-Type: text/plain; charset="utf-8" From: Jialong Yang 4.5.4. Supervisor MSI address configuration (smsiaddrcfg and smsiaddrcfgh) smsiaddrcfgh: bits 22:20 LHXS(WARL) bits 11:0 High Base PPN(WARL) Signed-off-by: Jialong Yang Acked-by: Alistair Francis Message-ID: <44f3e0d1.161.199d0c338b0.Coremail.z_bajeer@yeah.net> Signed-off-by: Alistair Francis Cc: qemu-stable@nongnu.org (cherry picked from commit 5e3e066e4ac894aff3e8dd3a072bca9c1986b2ff) Signed-off-by: Michael Tokarev diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c index cab8f0cd4d..0d9be9a584 100644 --- a/hw/intc/riscv_aplic.c +++ b/hw/intc/riscv_aplic.c @@ -96,7 +96,7 @@ (APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) << \ APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs)) =20 -#define APLIC_xMSICFGADDRH_VALID_MASK \ +#define APLIC_MMSICFGADDRH_VALID_MASK \ (APLIC_xMSICFGADDRH_L | \ (APLIC_xMSICFGADDRH_HHXS_MASK << APLIC_xMSICFGADDRH_HHXS_SHIFT) | \ (APLIC_xMSICFGADDRH_LHXS_MASK << APLIC_xMSICFGADDRH_LHXS_SHIFT) | \ @@ -104,6 +104,10 @@ (APLIC_xMSICFGADDRH_LHXW_MASK << APLIC_xMSICFGADDRH_LHXW_SHIFT) | \ APLIC_xMSICFGADDRH_BAPPN_MASK) =20 +#define APLIC_SMSICFGADDRH_VALID_MASK \ + ((APLIC_xMSICFGADDRH_LHXS_MASK << APLIC_xMSICFGADDRH_LHXS_SHIFT) | \ + APLIC_xMSICFGADDRH_BAPPN_MASK) + #define APLIC_SETIP_BASE 0x1c00 #define APLIC_SETIPNUM 0x1cdc =20 @@ -184,7 +188,7 @@ void riscv_aplic_set_kvm_msicfgaddr(RISCVAPLICState *ap= lic, hwaddr addr) addr >>=3D APLIC_xMSICFGADDR_PPN_SHIFT; aplic->kvm_msicfgaddr =3D extract64(addr, 0, 32); aplic->kvm_msicfgaddrH =3D extract64(addr, 32, 32) & - APLIC_xMSICFGADDRH_VALID_MASK; + APLIC_MMSICFGADDRH_VALID_MASK; } #endif } @@ -409,13 +413,8 @@ static void riscv_aplic_msi_send(RISCVAPLICState *apli= c, msicfgaddr =3D aplic->kvm_msicfgaddr; msicfgaddrH =3D ((uint64_t)aplic->kvm_msicfgaddrH << 32); } else { - if (aplic->mmode) { - msicfgaddr =3D aplic_m->mmsicfgaddr; - msicfgaddrH =3D aplic_m->mmsicfgaddrH; - } else { - msicfgaddr =3D aplic_m->smsicfgaddr; - msicfgaddrH =3D aplic_m->smsicfgaddrH; - } + msicfgaddr =3D aplic_m->mmsicfgaddr; + msicfgaddrH =3D aplic_m->mmsicfgaddrH; } =20 lhxs =3D (msicfgaddrH >> APLIC_xMSICFGADDRH_LHXS_SHIFT) & @@ -427,6 +426,14 @@ static void riscv_aplic_msi_send(RISCVAPLICState *apli= c, hhxw =3D (msicfgaddrH >> APLIC_xMSICFGADDRH_HHXW_SHIFT) & APLIC_xMSICFGADDRH_HHXW_MASK; =20 + if (!aplic->kvm_splitmode && !aplic->mmode) { + msicfgaddrH =3D aplic_m->smsicfgaddrH; + msicfgaddr =3D aplic_m->smsicfgaddr; + + lhxs =3D (msicfgaddrH >> APLIC_xMSICFGADDRH_LHXS_SHIFT) & + APLIC_xMSICFGADDRH_LHXS_MASK; + } + group_idx =3D hart_idx >> lhxw; =20 addr =3D msicfgaddr; @@ -771,7 +778,7 @@ static void riscv_aplic_write(void *opaque, hwaddr addr= , uint64_t value, } else if (aplic->mmode && aplic->msimode && (addr =3D=3D APLIC_MMSICFGADDRH)) { if (!(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) { - aplic->mmsicfgaddrH =3D value & APLIC_xMSICFGADDRH_VALID_MASK; + aplic->mmsicfgaddrH =3D value & APLIC_MMSICFGADDRH_VALID_MASK; } } else if (aplic->mmode && aplic->msimode && (addr =3D=3D APLIC_SMSICFGADDR)) { @@ -792,7 +799,7 @@ static void riscv_aplic_write(void *opaque, hwaddr addr= , uint64_t value, (addr =3D=3D APLIC_SMSICFGADDRH)) { if (aplic->num_children && !(aplic->mmsicfgaddrH & APLIC_xMSICFGADDRH_L)) { - aplic->smsicfgaddrH =3D value & APLIC_xMSICFGADDRH_VALID_MASK; + aplic->smsicfgaddrH =3D value & APLIC_SMSICFGADDRH_VALID_MASK; } } else if ((APLIC_SETIP_BASE <=3D addr) && (addr < (APLIC_SETIP_BASE + aplic->bitfield_words * 4))) { --=20 2.47.3