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Mon, 17 Nov 2025 00:48:01 -0800 (PST) X-Google-Smtp-Source: AGHT+IH4RnIczh/+SFD3CcfUVb3uKUYsCASYYfuBGZiETyuF4yws/fukm0fcfrZaWn8D0q4lwww3MA== X-Received: by 2002:a05:600c:8b4c:b0:477:7f4a:44ba with SMTP id 5b1f17b1804b1-4778fe60072mr91365105e9.4.1763369280698; Mon, 17 Nov 2025 00:48:00 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: qemu-rust@nongnu.org, zhao1.liu@intel.com Subject: [PATCH 2/5] rust/hpet: move hpet_offset to HPETRegisters Date: Mon, 17 Nov 2025 09:47:49 +0100 Message-ID: <20251117084752.203219-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.51.1 In-Reply-To: <20251117084752.203219-1-pbonzini@redhat.com> References: <20251117084752.203219-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1763369372693158500 Content-Type: text/plain; charset="utf-8" Likewise, do not separate hpet_offset from the other registers. However, because it is migrated in a subsection it is necessary to copy it out of HPETRegisters and into a BqlCell<>. Signed-off-by: Paolo Bonzini Reviewed-by: Zhao Liu --- rust/hw/timer/hpet/src/device.rs | 63 ++++++++++++++++++-------------- 1 file changed, 35 insertions(+), 28 deletions(-) diff --git a/rust/hw/timer/hpet/src/device.rs b/rust/hw/timer/hpet/src/devi= ce.rs index 79d818b43da..19676af74bc 100644 --- a/rust/hw/timer/hpet/src/device.rs +++ b/rust/hw/timer/hpet/src/device.rs @@ -383,14 +383,15 @@ fn update_irq(&self, regs: &mut HPETRegisters, set: b= ool) { self.set_irq(regs, set); } =20 - fn arm_timer(&self, tn_regs: &mut HPETTimerRegisters, tick: u64) { + fn arm_timer(&self, regs: &mut HPETRegisters, tick: u64) { // &HPETRegisters should be gotten from BqlRefCell, // but there's no lock guard to guarantee this. So we have to chec= k BQL // context explicitly. This check should be removed when we switch= to // Mutex. assert!(bql::is_locked()); =20 - let mut ns =3D self.get_state().get_ns(tick); + let mut ns =3D regs.get_ns(tick); + let tn_regs =3D &mut regs.tn_regs[self.index as usize]; =20 // Clamp period to reasonable min value (1 us) if tn_regs.is_periodic() && ns - tn_regs.last < 1000 { @@ -408,21 +409,22 @@ fn set_timer(&self, regs: &mut HPETRegisters) { // Mutex. assert!(bql::is_locked()); =20 + let cur_tick: u64 =3D regs.get_ticks(); let tn_regs =3D &mut regs.tn_regs[self.index as usize]; - let cur_tick: u64 =3D self.get_state().get_ticks(); =20 tn_regs.wrap_flag =3D 0; tn_regs.update_cmp64(cur_tick); + + let mut next_tick: u64 =3D tn_regs.cmp64; if tn_regs.is_32bit_mod() { // HPET spec says in one-shot 32-bit mode, generate an interru= pt when // counter wraps in addition to an interrupt with comparator m= atch. if !tn_regs.is_periodic() && tn_regs.cmp64 > hpet_next_wrap(cu= r_tick) { tn_regs.wrap_flag =3D 1; - self.arm_timer(tn_regs, hpet_next_wrap(cur_tick)); - return; + next_tick =3D hpet_next_wrap(cur_tick); } } - self.arm_timer(tn_regs, tn_regs.cmp64); + self.arm_timer(regs, next_tick); } =20 fn del_timer(&self, regs: &mut HPETRegisters) { @@ -584,8 +586,8 @@ fn callback(&self, regs: &mut HPETRegisters) { // Mutex. assert!(bql::is_locked()); =20 + let cur_tick: u64 =3D regs.get_ticks(); let tn_regs =3D &mut regs.tn_regs[self.index as usize]; - let cur_tick: u64 =3D self.get_state().get_ticks(); =20 if tn_regs.is_periodic() && tn_regs.period !=3D 0 { while hpet_time_after(cur_tick, tn_regs.cmp64) { @@ -596,11 +598,11 @@ fn callback(&self, regs: &mut HPETRegisters) { } else { tn_regs.cmp =3D tn_regs.cmp64; } - self.arm_timer(tn_regs, tn_regs.cmp64); } else if tn_regs.wrap_flag !=3D 0 { tn_regs.wrap_flag =3D 0; - self.arm_timer(tn_regs, tn_regs.cmp64); } + let next_tick =3D tn_regs.cmp64; + self.arm_timer(regs, next_tick); self.update_irq(regs, true); } =20 @@ -663,9 +665,22 @@ pub struct HPETRegisters { =20 /// HPET Timer N Registers tn_regs: [HPETTimerRegisters; HPET_MAX_TIMERS], + + /// Offset of main counter relative to qemu clock. + pub hpet_offset: u64, } =20 impl HPETRegisters { + fn get_ticks(&self) -> u64 { + // Protect hpet_offset in lockless IO case which would not lock BQ= L. + ns_to_ticks(CLOCK_VIRTUAL.get_ns() + self.hpet_offset) + } + + fn get_ns(&self, tick: u64) -> u64 { + // Protect hpet_offset in lockless IO case which would not lock BQ= L. + ticks_to_ns(tick) - self.hpet_offset + } + fn is_legacy_mode(&self) -> bool { self.config & (1 << HPET_CFG_LEG_RT_SHIFT) !=3D 0 } @@ -693,8 +708,7 @@ pub struct HPETState { #[property(rename =3D "msi", bit =3D HPET_FLAG_MSI_SUPPORT_SHIFT, defa= ult =3D false)] flags: u32, =20 - /// Offset of main counter relative to qemu clock. - hpet_offset: BqlCell, + hpet_offset_migration: BqlCell, #[property(rename =3D "hpet-offset-saved", default =3D true)] hpet_offset_saved: bool, =20 @@ -726,14 +740,6 @@ const fn has_msi_flag(&self) -> bool { self.flags & (1 << HPET_FLAG_MSI_SUPPORT_SHIFT) !=3D 0 } =20 - fn get_ticks(&self) -> u64 { - ns_to_ticks(CLOCK_VIRTUAL.get_ns() + self.hpet_offset.get()) - } - - fn get_ns(&self, tick: u64) -> u64 { - ticks_to_ns(tick) - self.hpet_offset.get() - } - fn handle_legacy_irq(&self, irq: u32, level: u32) { let regs =3D self.regs.borrow(); if irq =3D=3D HPET_LEGACY_PIT_INT { @@ -779,8 +785,7 @@ fn set_cfg_reg(&self, regs: &mut HPETRegisters, shift: = u32, len: u32, val: u64) =20 if activating_bit(old_val, new_val, HPET_CFG_ENABLE_SHIFT) { // Enable main counter and interrupt generation. - self.hpet_offset - .set(ticks_to_ns(regs.counter) - CLOCK_VIRTUAL.get_ns()); + regs.hpet_offset =3D ticks_to_ns(regs.counter) - CLOCK_VIRTUAL= .get_ns(); =20 for timer in self.timers.iter().take(self.num_timers) { let t =3D timer.borrow(); @@ -794,7 +799,7 @@ fn set_cfg_reg(&self, regs: &mut HPETRegisters, shift: = u32, len: u32, val: u64) } } else if deactivating_bit(old_val, new_val, HPET_CFG_ENABLE_SHIFT= ) { // Halt main counter and disable interrupt generation. - regs.counter =3D self.get_ticks(); + regs.counter =3D regs.get_ticks(); =20 for timer in self.timers.iter().take(self.num_timers) { timer.borrow().del_timer(regs); @@ -873,7 +878,7 @@ unsafe fn init(mut this: ParentInit) { // initialized memory to all zeros - simple types (bool/u32/usize)= can // rely on this without explicit initialization. uninit_field_mut!(*this, regs).write(Default::default()); - uninit_field_mut!(*this, hpet_offset).write(Default::default()); + uninit_field_mut!(*this, hpet_offset_migration).write(Default::def= ault()); // Set null_mut for now and post_init() will fill it. uninit_field_mut!(*this, irqs).write(Default::default()); uninit_field_mut!(*this, rtc_irq_level).write(Default::default()); @@ -929,6 +934,7 @@ fn reset_hold(&self, _type: ResetType) { =20 regs.counter =3D 0; regs.config =3D 0; + regs.hpet_offset =3D 0; HPETFwConfig::update_hpet_cfg( self.hpet_id.get(), regs.capability as u32, @@ -937,7 +943,6 @@ fn reset_hold(&self, _type: ResetType) { } =20 self.pit_enabled.set(true); - self.hpet_offset.set(0); =20 // to document that the RTC lowers its output on reset as well self.rtc_irq_level.set(0); @@ -982,7 +987,7 @@ fn read(&self, addr: hwaddr, size: u32) -> u64 { Global(INT_STATUS) =3D> regs.int_status, Global(COUNTER) =3D> { let cur_tick =3D if regs.is_hpet_enabled() { - self.get_ticks() + regs.get_ticks() } else { regs.counter }; @@ -1018,8 +1023,9 @@ fn write(&self, addr: hwaddr, value: u64, size: u32) { =20 fn pre_save(&self) -> Result<(), migration::Infallible> { let mut regs =3D self.regs.borrow_mut(); + self.hpet_offset_migration.set(regs.hpet_offset); if regs.is_hpet_enabled() { - regs.counter =3D self.get_ticks(); + regs.counter =3D regs.get_ticks(); } =20 /* @@ -1044,9 +1050,10 @@ fn post_load(&self, _version_id: u8) -> Result<(), m= igration::Infallible> { =20 // Recalculate the offset between the main counter and guest time if !self.hpet_offset_saved { - self.hpet_offset + self.hpet_offset_migration .set(ticks_to_ns(regs.counter) - CLOCK_VIRTUAL.get_ns()); } + regs.hpet_offset =3D self.hpet_offset_migration.get(); =20 Ok(()) } @@ -1098,7 +1105,7 @@ impl ObjectImpl for HPETState { .minimum_version_id(1) .needed(&HPETState::is_offset_needed) .fields(vmstate_fields! { - vmstate_of!(HPETState, hpet_offset), + vmstate_of!(HPETState, hpet_offset_migration), }) .build(); =20 --=20 2.51.1