From nobody Fri Nov 14 23:30:42 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1762861768; cv=none; d=zohomail.com; s=zohoarc; b=EgK6v9mglW5dtTWE0tzbOF8IjruCOV1UQboM06CrW9wIBYytVe3KP2oAW9h9IdC28S+wmriQTZRqTIjIh6n2/zAaoDiRQAb7hG42pm4VITjaQsWdljvxW9wBYGRV/fbgrYtl9Zml2bxax8/LfrSoGv/7/C4ByZEQQgWtaPcw7W0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1762861768; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=FVYI3uDYuiUnuBphImalv/xBwCe/21ga86oRo136tDE=; b=fa0pCwLWQ/Iw3XOZWOOn9plD3WpeXC0q6UONaJgMQvDLGDAy9bRLWOV9b9iCGx2+2PzF8ZXYBoPMMHU+BJLaZ27A8J+kFjM10TATs/YUhKyuJCFn99TgBkloRmPkCNgefBPdnFrHhXS5KO3itAXhe+dEOfDekOmv6lcXwBT4E9E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1762861768051657.3316715083233; Tue, 11 Nov 2025 03:49:28 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vImrP-00071d-HM; Tue, 11 Nov 2025 06:48:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vImqh-000502-7Q for qemu-devel@nongnu.org; Tue, 11 Nov 2025 06:47:47 -0500 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vImqe-0004Q9-4u for qemu-devel@nongnu.org; Tue, 11 Nov 2025 06:47:46 -0500 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-b553412a19bso2381501a12.1 for ; Tue, 11 Nov 2025 03:47:41 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([179.93.21.233]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29651c747d1sm177533125ad.63.2025.11.11.03.47.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Nov 2025 03:47:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1762861660; x=1763466460; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FVYI3uDYuiUnuBphImalv/xBwCe/21ga86oRo136tDE=; b=ohkrdcSuj+flJaShRGoY9z471IdMV++XszvH9PL6/9UeQ2Nw87zejgSekGA2MNZ1B0 yEnHtoDTF2FplZDQQIsdIdU03SHI3aHKu+HowIoX83sFQlDvDz1VYoIGFkDWq8w8sBGU 4vxUCClADGB3sSOPL0i0X4+LHmf7O5WU+vDqmcpgI30WqmO5/SA1wahXG3L1MDoZou5z bGhGriXMDl9xhUW9cMgf4IiMTJDdiOdVg7D9W2S3H5fTwuHASfhQanNQRDCa5W0QU708 gOMrdJbxDkZrBNeYR2yjepqlWNCUq78hehZh05rNpqNUKel94F4iAwb3rP+pofbNZaqW 6TFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762861660; x=1763466460; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=FVYI3uDYuiUnuBphImalv/xBwCe/21ga86oRo136tDE=; b=CPCPNwKSiVDQxQ0jo7ddMsPrOTZbbIiDA4ffztRQY6fHihZeEc3jFyq07vVivLqF/G utCoM1FB1YBy707XsQkQfmV4zuwMXZmYN1n+2fF2RF55dWMqTdRbNcls0iBSFI/xZenK 5G17G5Fa/u6xbrZsavSBlqpKVZ0R6iFjHMByle0qP3WnCEvsSwUbEIcf6Au+SIE2ToPe chei+1qFCW4p7eWA/pBDqWQFTeRCWUa7yvqiGptMFGsFhfJzYEPOIsjKfSKqkBM4kRkC b7ZVmyI+zeAPLE93++vEW+kaZ31CtxInRMfIpZZhSfN8LeFRR8eBPNmEPIAmx3PumUwM EzEg== X-Gm-Message-State: AOJu0Yyp86nAeF0WQbBiW3Fzt6T74xNeHmeUPPnfsuVo9aqrBPNbFQ/1 6W+Q5Ff3YLCVAAlFCsN91LOTT3ryIjyZWbB+VbyMLF7xG0NJVi7026odEPTutkMWfeJ0mPi7VLo wAbc0L1Y= X-Gm-Gg: ASbGncsIpkMrMoeztncEPvaf2tEDjw1nbDrW0NiO8hbxKMsk0aBhZv5mj4eucOvFYie olM5eyW3bNzRWRV5oDP54ZBOAJynuzY9dKNNpGnwTdIfyaZFf3mifQHsBRFJeCjGtPFYe5E8IH+ MjZZXpYZ9aecniXP2c1z5boUwi5dc9Rqn6NIZHbEBKlMJSKZPu7BbgIT6Khr4gVzBqDf/lh0HbY 2EQgfQ6OlPnWtxgDN9p9+lDylvrDQpKxR1bWNM6piT33r27XDYs/q8qfMV9x1iLefZvmpzbCShH rSPc5aHkaeK/kuuOSgWPwqKL1Pk+/m23dXJFb5Om8T20rR6Ss+oMUlt4cvfWF67SMEck2Dl0dQs 81GmIEKlEtzKT2fot7RBNbNoUE/eOXOPntKC+iIX4cQWuMD0EiCPa53yPjiLqZxjpV8KCuDDAez OkK/hD/xk0S+4kkqbQnE0pdWPQ8xw= X-Google-Smtp-Source: AGHT+IG/JmIzL6MQOcq4afromovbKQ+ojOkf+fQTkALXHkrzQWcq5fyv9wHkfQQIeXKgw8ke2ICTWA== X-Received: by 2002:a17:903:3848:b0:294:def6:5961 with SMTP id d9443c01a7336-297e56d0868mr156485935ad.45.1762861660161; Tue, 11 Nov 2025 03:47:40 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@dabbelt.com, Mayuresh Chitale , Daniel Henrique Barboza Subject: [PATCH v2 05/17] hw/riscv/virt.c add trace encoder and ramsink fdt nodes Date: Tue, 11 Nov 2025 08:46:44 -0300 Message-ID: <20251111114656.2285048-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.51.1 In-Reply-To: <20251111114656.2285048-1-dbarboza@ventanamicro.com> References: <20251111114656.2285048-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=dbarboza@ventanamicro.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1762861770694158500 Content-Type: text/plain; charset="utf-8" From: Mayuresh Chitale The trace encoder and trace ramsink nodes should confirm to the bindings described in "riscv,trace-component.yaml" in the Linux kernel. That way, encoder and ramsink devices get populated on the rvtrace bus and perf record is able to capture the trace data in the auxtrace section as expected. Signed-off-by: Mayuresh Chitale Signed-off-by: Daniel Henrique Barboza --- hw/riscv/virt.c | 58 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index b1a4d63efd..30e89a6c5a 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1142,6 +1142,62 @@ static void create_fdt_iommu(RISCVVirtState *s, uint= 16_t bdf) s->pci_iommu_bdf =3D bdf; } =20 +static void create_fdt_rvtrace(RISCVVirtState *s) +{ + static const char * const tr_compat[2] =3D { "qemu,trace-component", + "riscv,trace-component" }; + g_autofree char *cpu_name =3D NULL, *ram_sink_name =3D NULL, + *trencoder_name =3D NULL, *ep =3D NULL; + MachineState *ms =3D MACHINE(s); + int socket_count =3D riscv_socket_count(ms), i; + uint64_t addr, size =3D 0x100; + uint32_t rs_phandle; + RISCVCPU *cpu_ptr; + + + for (i =3D 0; i < socket_count; i++) { + for (int cpu =3D 0; cpu < s->soc[i].num_harts; cpu++) { + cpu_ptr =3D &s->soc[i].harts[cpu]; + if (!cpu_ptr->trencoder) { + continue; + } + cpu_name =3D g_strdup_printf("/cpus/cpu@%d", + s->soc[i].hartid_base + cpu); + ram_sink_name =3D g_strdup_printf("/soc/ramsink@%d", + s->soc[i].hartid_base + cpu); + qemu_fdt_add_subnode(ms->fdt, ram_sink_name); + addr =3D object_property_get_uint(cpu_ptr->trencoder, "dest-ba= seaddr", + &error_abort); + qemu_fdt_setprop_sized_cells(ms->fdt, ram_sink_name, "reg", 2,= addr, + 2, size); + qemu_fdt_setprop_string_array(ms->fdt, ram_sink_name, "compati= ble", + (char **)&tr_compat, + ARRAY_SIZE(tr_compat)); + qemu_fdt_setprop_phandle(ms->fdt, ram_sink_name, "cpu", cpu_na= me); + ep =3D g_strdup_printf("%s/in-ports/port/endpoint", ram_sink_n= ame); + qemu_fdt_add_path(ms->fdt, ep); + rs_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); + qemu_fdt_setprop_cell(ms->fdt, ep, "phandle", rs_phandle); + + + trencoder_name =3D g_strdup_printf("/soc/encoder@%d", + s->soc[i].hartid_base + cpu); + qemu_fdt_add_subnode(ms->fdt, trencoder_name); + addr =3D object_property_get_uint(cpu_ptr->trencoder, "baseadd= r", + &error_abort); + qemu_fdt_setprop_sized_cells(ms->fdt, trencoder_name, "reg", 2, + addr, 2, size); + qemu_fdt_setprop_string_array(ms->fdt, trencoder_name, "compat= ible", + (char **)&tr_compat, + ARRAY_SIZE(tr_compat)); + qemu_fdt_setprop_phandle(ms->fdt, trencoder_name, "cpus", cpu_= name); + ep =3D g_strdup_printf("%s/out-ports/port/endpoint", trencoder= _name); + qemu_fdt_add_path(ms->fdt, ep); + qemu_fdt_setprop_cell(ms->fdt, ep, "remote-endpoint", rs_phand= le); + } + } +} + static void finalize_fdt(RISCVVirtState *s) { uint32_t phandle =3D 1, irq_mmio_phandle =3D 1, msi_pcie_phandle =3D 1; @@ -1166,6 +1222,8 @@ static void finalize_fdt(RISCVVirtState *s) create_fdt_uart(s, irq_mmio_phandle); =20 create_fdt_rtc(s, irq_mmio_phandle); + + create_fdt_rvtrace(s); } =20 static void create_fdt(RISCVVirtState *s) --=20 2.51.1