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charset="utf-8" For more clarity, rename the cpu_riscv_read_rtc function to riscv_aclint_mtimer_get_ticks: - The ACLINT is the time source here, not the CPU, - This function returns a number of ticks based on the timer frequency. Rename the _raw version of this function as well and the local variables storing the result of those function. Signed-off-by: Luc Michel Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/intc/riscv_aclint.c | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c index 5f5ffc61e80..95398e48821 100644 --- a/hw/intc/riscv_aclint.c +++ b/hw/intc/riscv_aclint.c @@ -38,20 +38,21 @@ typedef struct riscv_aclint_mtimer_callback { RISCVAclintMTimerState *s; int num; } riscv_aclint_mtimer_callback; =20 -static uint64_t cpu_riscv_read_rtc_raw(uint32_t timebase_freq) +static uint64_t riscv_aclint_mtimer_get_ticks_raw(uint32_t timebase_freq) { return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), timebase_freq, NANOSECONDS_PER_SECOND); } =20 -static uint64_t cpu_riscv_read_rtc(void *opaque) +static uint64_t riscv_aclint_mtimer_get_ticks(void *opaque) { RISCVAclintMTimerState *mtimer =3D opaque; - return cpu_riscv_read_rtc_raw(mtimer->timebase_freq) + mtimer->time_de= lta; + return riscv_aclint_mtimer_get_ticks_raw(mtimer->timebase_freq) + + mtimer->time_delta; } =20 /* * Called when timecmp is written to update the QEMU timer or immediately * trigger timer interrupt if mtimecmp <=3D current timer value. @@ -63,28 +64,28 @@ static void riscv_aclint_mtimer_write_timecmp(RISCVAcli= ntMTimerState *mtimer, { uint32_t timebase_freq =3D mtimer->timebase_freq; uint64_t next; uint64_t diff; =20 - uint64_t rtc =3D cpu_riscv_read_rtc(mtimer); + uint64_t ticks =3D riscv_aclint_mtimer_get_ticks(mtimer); =20 /* Compute the relative hartid w.r.t the socket */ hartid =3D hartid - mtimer->hartid_base; =20 mtimer->timecmp[hartid] =3D value; - if (mtimer->timecmp[hartid] <=3D rtc) { + if (mtimer->timecmp[hartid] <=3D ticks) { /* * If we're setting an MTIMECMP value in the "past", * immediately raise the timer interrupt */ qemu_irq_raise(mtimer->timer_irqs[hartid]); return; } =20 /* otherwise, set up the future timer interrupt */ qemu_irq_lower(mtimer->timer_irqs[hartid]); - diff =3D mtimer->timecmp[hartid] - rtc; + diff =3D mtimer->timecmp[hartid] - ticks; /* back to ns (note args switched in muldiv64) */ uint64_t ns_diff =3D muldiv64(diff, NANOSECONDS_PER_SECOND, timebase_f= req); =20 /* * check if ns_diff overflowed and check if the addition would potenti= ally @@ -149,15 +150,15 @@ static uint64_t riscv_aclint_mtimer_read(void *opaque= , hwaddr addr, "aclint-mtimer: invalid read: %08x", (uint32_t)a= ddr); return 0; } } else if (addr =3D=3D mtimer->time_base) { /* time_lo for RV32/RV64 or timecmp for RV64 */ - uint64_t rtc =3D cpu_riscv_read_rtc(mtimer); - return (size =3D=3D 4) ? (rtc & 0xFFFFFFFF) : rtc; + uint64_t ticks =3D riscv_aclint_mtimer_get_ticks(mtimer); + return (size =3D=3D 4) ? (ticks & 0xFFFFFFFF) : ticks; } else if (addr =3D=3D mtimer->time_base + 4) { /* time_hi */ - return (cpu_riscv_read_rtc(mtimer) >> 32) & 0xFFFFFFFF; + return (riscv_aclint_mtimer_get_ticks(mtimer) >> 32) & 0xFFFFFFFF; } =20 qemu_log_mask(LOG_UNIMP, "aclint-mtimer: invalid read: %08x", (uint32_t)addr); return 0; @@ -206,25 +207,25 @@ static void riscv_aclint_mtimer_write(void *opaque, h= waddr addr, "aclint-mtimer: invalid timecmp write: %08x", (uint32_t)addr); } return; } else if (addr =3D=3D mtimer->time_base || addr =3D=3D mtimer->time_b= ase + 4) { - uint64_t rtc_r =3D cpu_riscv_read_rtc_raw(mtimer->timebase_freq); - uint64_t rtc =3D cpu_riscv_read_rtc(mtimer); + uint64_t ticks_r =3D riscv_aclint_mtimer_get_ticks_raw(mtimer->tim= ebase_freq); + uint64_t ticks =3D riscv_aclint_mtimer_get_ticks(mtimer); =20 if (addr =3D=3D mtimer->time_base) { if (size =3D=3D 4) { /* time_lo for RV32/RV64 */ - mtimer->time_delta =3D ((rtc & ~0xFFFFFFFFULL) | value) - = rtc_r; + mtimer->time_delta =3D ((ticks & ~0xFFFFFFFFULL) | value) = - ticks_r; } else { /* time for RV64 */ - mtimer->time_delta =3D value - rtc_r; + mtimer->time_delta =3D value - ticks_r; } } else { if (size =3D=3D 4) { /* time_hi for RV32/RV64 */ - mtimer->time_delta =3D (value << 32 | (rtc & 0xFFFFFFFF)) = - rtc_r; + mtimer->time_delta =3D (value << 32 | (ticks & 0xFFFFFFFF)= ) - ticks_r; } else { qemu_log_mask(LOG_GUEST_ERROR, "aclint-mtimer: invalid time_hi write: %08x", (uint32_t)addr); return; @@ -395,11 +396,11 @@ DeviceState *riscv_aclint_mtimer_create(hwaddr addr, = hwaddr size, if (!env) { g_free(cb); continue; } if (provide_rdtime) { - riscv_cpu_set_rdtime_fn(env, cpu_riscv_read_rtc, dev); + riscv_cpu_set_rdtime_fn(env, riscv_aclint_mtimer_get_ticks, de= v); } =20 cb->s =3D s; cb->num =3D i; s->timers[i] =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, --=20 2.51.0