From nobody Fri Nov 14 16:59:38 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1762419025; cv=none; d=zohomail.com; s=zohoarc; b=dGPrM4woTeqyw5JHmX2mbPtYyh9lYMxH6pdQaQm1ttaqXC7xJrnmC7Ue0XTSJSuK6uNld8GxVWcaYA3zy+UYAMSxj6Pcq5xJY9vr5MF7t8l4oqW6uMAa3Hdfnqp/dUT6ob7hUmBx+IWzkZrC46KrAGqohAHNL26tl46XLxHbdy8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1762419025; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=H5nn6aPSuVbQ9j7SUP9btTx+BFaAQEG41snu8FEZXpo=; b=E21NByN2mWqaoEdcowdLwKETq5ioKUqArGrrY1uB8OBsn6sJasjiDU8ezXI3jSOMS+GeQT/MvRhEk4TFQ2e9WnY8avzWNfWNgWzl6n9Jc5gUyzCPlYkb8dksFOmuVhtgqsLrC0qXukrXx0FRgibe3rpECUEQ7BAR2mNiBP03rAo= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1762419025294585.3096367528407; Thu, 6 Nov 2025 00:50:25 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vGvga-0002xi-Qk; Thu, 06 Nov 2025 03:49:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vGvgZ-0002vw-2f; Thu, 06 Nov 2025 03:49:39 -0500 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vGvgX-0005Sg-ES; Thu, 06 Nov 2025 03:49:38 -0500 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Thu, 6 Nov 2025 16:49:25 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Thu, 6 Nov 2025 16:49:25 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , Alistair Francis , "Kevin Wolf" , Hanna Reitz , "open list:ASPEED BMCs" , "open list:All patches CC here" , "open list:Block layer core" CC: , , Subject: [PATCH v1 01/12] hw/arm/aspeed: Fix missing SPI IRQ connection causing DMA interrupt failure Date: Thu, 6 Nov 2025 16:49:10 +0800 Message-ID: <20251106084925.1253704-2-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251106084925.1253704-1-jamin_lin@aspeedtech.com> References: <20251106084925.1253704-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1762419030688158500 Content-Type: text/plain; charset="utf-8" It did not connect SPI IRQ to the Interrupt Controller, so even the SPI model raised the IRQ, the interrupt was not received. The CPU therefore did not trigger an interrupt via the controller, and the firmware never received the interrupt. Fixes: 356b230ed13889e09d087a96498887de695df17e ("aspeed/soc: Add AST1030 s= upport") Fixes: f25c0ae1079dc0b9de02676eb3e3949a09df9f41 ("aspeed/soc: Add AST2600 s= upport") Fixes: 5dd883ab0635c9f715c77cc32622e458a0724581 ("aspeed/soc: Add AST2700 s= upport") Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- hw/arm/aspeed_ast10x0.c | 2 ++ hw/arm/aspeed_ast2600.c | 2 ++ hw/arm/aspeed_ast27x0.c | 2 ++ 3 files changed, 6 insertions(+) diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 7f49c13391..ca487774ae 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -372,6 +372,8 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev= _soc, Error **errp) sc->memmap[ASPEED_DEV_SPI1 + i]); aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 1, ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_bas= e); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, + aspeed_soc_ast1030_get_irq(s, ASPEED_DEV_SPI1 += i)); } =20 /* Secure Boot Controller */ diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 498d1ecc07..4c5a42ea17 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -557,6 +557,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) sc->memmap[ASPEED_DEV_SPI1 + i]); aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 1, ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_bas= e); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_SPI1 += i)); } =20 /* EHCI */ diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index c484bcd4e2..e02a674b13 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -831,6 +831,8 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) sc->memmap[ASPEED_DEV_SPI0 + i]); aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 1, ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_bas= e); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, + aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_SPI0 += i)); } =20 /* EHCI */ --=20 2.43.0