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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1762245147; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=26X8tl9GE3ydtH2Ji2i5LPQ/OKh+UBH7/ZgyeaanEgo=; b=KIBUCkvr6pzdryZcN/WGawY6h5Jk4QaP9zm+LrEoXf6zhCdELuOs1A7fQ8Qg9u6CDdVMhm 2pSAgG5Epp9A/ji8JHjOqEU9Y/YX94lrqZ//qHi3I8WIPvQpMU7CKfVK3IG5wjOmNNWU9P YzwySs1gwQTarZgiPLcB9rg0klWwIt4= X-MC-Unique: 3Hw-ugicPOut9jO9pPGTuA-1 X-Mimecast-MFC-AGG-ID: 3Hw-ugicPOut9jO9pPGTuA_1762245143 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jamin Lin , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 15/30] hw/arm/aspeed: Split Supermicro X11 machine into a separate source file for maintainability Date: Tue, 4 Nov 2025 09:31:29 +0100 Message-ID: <20251104083144.187806-16-clg@redhat.com> In-Reply-To: <20251104083144.187806-1-clg@redhat.com> References: <20251104083144.187806-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1762245260241158500 From: Jamin Lin This commit moves the Supermicro X11 BMC machine implementation out of aspeed.c into a new standalone file aspeed_ast2400_supermicrox11.c and removes its dependency on the Palmetto platform=E2=80=99s I=C2=B2C initiali= zation. This refactor continues the modularization effort for Aspeed platform suppo= rt, ensuring that each board=E2=80=99s configuration resides in its own dedicat= ed source file. By duplicating and renaming the palmetto_bmc_i2c_init() logic into supermicrox11_bmc_i2c_init(), this change removes unwanted coupling between the two board definitions. Key updates include: - Moved SUPERMICROX11_BMC_HW_STRAP1 macro definition into a new file. - Moved aspeed_machine_supermicrox11_bmc_class_init() and type registration= into a new file. - Added a dedicated supermicrox11_bmc_i2c_init() function (copied and renam= ed from Palmetto=E2=80=99s version). - Added the new file aspeed_ast2400_supermicrox11.c to the build system (me= son.build). - Removed all Supermicro X11=E2=80=93specific code and macros from aspeed.c. No functional changes. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-16-jamin_lin= @aspeedtech.com Signed-off-by: C=C3=A9dric Le Goater --- hw/arm/aspeed.c | 37 ------------ hw/arm/aspeed_ast2400_supermicrox11.c | 81 +++++++++++++++++++++++++++ hw/arm/meson.build | 1 + 3 files changed, 82 insertions(+), 37 deletions(-) create mode 100644 hw/arm/aspeed_ast2400_supermicrox11.c diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index f9e6d8c4c6dc..fbd27020bd2d 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -57,20 +57,6 @@ static struct arm_boot_info aspeed_board_binfo =3D { SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) =20 -/* TODO: Find the actual hardware value */ -#define SUPERMICROX11_BMC_HW_STRAP1 ( \ - SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ - SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \ - SCU_AST2400_HW_STRAP_ACPI_DIS | \ - SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ - SCU_HW_STRAP_VGA_CLASS_CODE | \ - SCU_HW_STRAP_LPC_RESET_PIN | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ - SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) = | \ - SCU_HW_STRAP_SPI_WIDTH | \ - SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ - SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) - /* AST2600 evb hardware value */ #define AST2600_EVB_HW_STRAP1 0x000000C0 #define AST2600_EVB_HW_STRAP2 0x00000003 @@ -1073,24 +1059,6 @@ static void aspeed_machine_palmetto_class_init(Objec= tClass *oc, aspeed_machine_class_init_cpus_defaults(mc); }; =20 -static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc =3D MACHINE_CLASS(oc); - AspeedMachineClass *amc =3D ASPEED_MACHINE_CLASS(oc); - - mc->desc =3D "Supermicro X11 BMC (ARM926EJ-S)"; - amc->soc_name =3D "ast2400-a1"; - amc->hw_strap1 =3D SUPERMICROX11_BMC_HW_STRAP1; - amc->fmc_model =3D "mx25l25635e"; - amc->spi_model =3D "mx25l25635e"; - amc->num_cs =3D 1; - amc->macs_mask =3D ASPEED_MAC0_ON | ASPEED_MAC1_ON; - amc->i2c_init =3D palmetto_bmc_i2c_init; - mc->default_ram_size =3D 256 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -} - static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, const void *data) { @@ -1441,11 +1409,6 @@ static const TypeInfo aspeed_machine_types[] =3D { .parent =3D TYPE_ASPEED_MACHINE, .class_init =3D aspeed_machine_palmetto_class_init, .interfaces =3D arm_machine_interfaces, - }, { - .name =3D MACHINE_TYPE_NAME("supermicrox11-bmc"), - .parent =3D TYPE_ASPEED_MACHINE, - .class_init =3D aspeed_machine_supermicrox11_bmc_class_init, - .interfaces =3D arm_machine_interfaces, }, { .name =3D MACHINE_TYPE_NAME("ast2600-evb"), .parent =3D TYPE_ASPEED_MACHINE, diff --git a/hw/arm/aspeed_ast2400_supermicrox11.c b/hw/arm/aspeed_ast2400_= supermicrox11.c new file mode 100644 index 000000000000..88cdb01fc762 --- /dev/null +++ b/hw/arm/aspeed_ast2400_supermicrox11.c @@ -0,0 +1,81 @@ +/* + * Supermicro X11 + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/smbus_eeprom.h" + +/* TODO: Find the actual hardware value */ +#define SUPERMICROX11_BMC_HW_STRAP1 ( \ + SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ + SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \ + SCU_AST2400_HW_STRAP_ACPI_DIS | \ + SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ + SCU_HW_STRAP_VGA_CLASS_CODE | \ + SCU_HW_STRAP_LPC_RESET_PIN | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ + SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) = | \ + SCU_HW_STRAP_SPI_WIDTH | \ + SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ + SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) + +static void supermicrox11_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc =3D bmc->soc; + DeviceState *dev; + uint8_t *eeprom_buf =3D g_malloc0(32 * 1024); + + /* + * The palmetto platform expects a ds3231 RTC but a ds1338 is + * enough to provide basic RTC features. Alarms will be missing + */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x= 68); + + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, + eeprom_buf); + + /* add a TMP423 temperature sensor */ + dev =3D DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2= ), + "tmp423", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abo= rt); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abo= rt); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abo= rt); + object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_ab= ort); +} + +static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc =3D MACHINE_CLASS(oc); + AspeedMachineClass *amc =3D ASPEED_MACHINE_CLASS(oc); + + mc->desc =3D "Supermicro X11 BMC (ARM926EJ-S)"; + amc->soc_name =3D "ast2400-a1"; + amc->hw_strap1 =3D SUPERMICROX11_BMC_HW_STRAP1; + amc->fmc_model =3D "mx25l25635e"; + amc->spi_model =3D "mx25l25635e"; + amc->num_cs =3D 1; + amc->macs_mask =3D ASPEED_MAC0_ON | ASPEED_MAC1_ON; + amc->i2c_init =3D supermicrox11_bmc_i2c_init; + mc->default_ram_size =3D 256 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static const TypeInfo aspeed_ast2400_supermicrox11_types[] =3D { + { + .name =3D MACHINE_TYPE_NAME("supermicrox11-bmc"), + .parent =3D TYPE_ASPEED_MACHINE, + .class_init =3D aspeed_machine_supermicrox11_bmc_class_init, + .interfaces =3D arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2400_supermicrox11_types) diff --git a/hw/arm/meson.build b/hw/arm/meson.build index 5467ee673db7..ea2d24af88a0 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -45,6 +45,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( 'aspeed_soc_common.c', 'aspeed_ast2400.c', 'aspeed_ast2400_quanta-q71l.c', + 'aspeed_ast2400_supermicrox11.c', 'aspeed_ast2500_evb.c', 'aspeed_ast2500_fp5280g2.c', 'aspeed_ast2500_g220a.c', --=20 2.51.1