From nobody Sun Nov 16 02:28:11 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1762226081; cv=none; d=zohomail.com; s=zohoarc; b=nHuXWMrK6iUBu+LcaM8cARnKuuIn2ewNv48fEDX9ysx2Y/dgjQjhC5UBt5BK6x08nnXfXme8lboWHuRCSLVuD6rIeE3uXxET/VbsRiAanTcrBF39tCXzTcSITYnK1Z36aqmn3sYXtUffcXiuaIwi+oInKBr+EldedD/0VHyds54= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1762226081; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=Kc4tZZ+rgkEQTm6k1LLTO3zizBxg8s9fG15YALDOEJs=; b=NnLV+t6zWtK0h/4KV1zQ5RX5AT7sDUDKjKsWwK7+rhhLt8Tirl2ZvCkcJHw9nS1esp8TW57TJWNWA5FbE45IBgnxl+MXwDAUiqtok+AcluqKTPaOSpzn6iS+RbgdoMqq3vY+4ZL2liYuDSGGk+o9mkxkBxRE5RwwIvYNdhJwGjg= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1762226081825941.0290243669592; Mon, 3 Nov 2025 19:14:41 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vG7Uf-0002U3-EG; Mon, 03 Nov 2025 22:14:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vG7UM-0002SF-Nb; Mon, 03 Nov 2025 22:13:44 -0500 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vG7UK-00031V-6f; Mon, 03 Nov 2025 22:13:42 -0500 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 4 Nov 2025 11:13:26 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 4 Nov 2025 11:13:26 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:All patches CC here" , "open list:ASPEED BMCs" CC: , , , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PATCH v4 02/30] hw/arm/aspeed: Make aspeed_machine_class_init_cpus_defaults() globally accessible Date: Tue, 4 Nov 2025 11:12:40 +0800 Message-ID: <20251104031325.146374-3-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251104031325.146374-1-jamin_lin@aspeedtech.com> References: <20251104031325.146374-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1762226083232154100 The function aspeed_machine_class_init_cpus_defaults() is now made globally visible so that it can be used by other Aspeed machine C files. Previously, this function was declared as static, restricting its visibility to aspeed.c. Since future machine split files will also need to call this helper to initialize default CPU settings, its declaration has been moved to the common header aspeed.h and the static keyword has been removed. No functional changes. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- include/hw/arm/aspeed.h | 10 ++++++++++ hw/arm/aspeed.c | 2 +- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index 9d34be68b2..712014497e 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -57,5 +57,15 @@ struct AspeedMachineClass { bool vbootrom; }; =20 +/* + * aspeed_machine_class_init_cpus_defaults: + * @mc: the #MachineClass to be initialized. + * + * Initialize the default CPU configuration for an Aspeed machine class. + * This function sets the default, minimum, and maximum CPU counts + * to match the number of CPUs defined in the associated SoC class, + * and copies its list of valid CPU types. + */ +void aspeed_machine_class_init_cpus_defaults(MachineClass *mc); =20 #endif diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 4c92f1e1d9..f23af5bf8c 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -1339,7 +1339,7 @@ static void aspeed_machine_class_props_init(ObjectCla= ss *oc) "Change the SPI Flash model"); } =20 -static void aspeed_machine_class_init_cpus_defaults(MachineClass *mc) +void aspeed_machine_class_init_cpus_defaults(MachineClass *mc) { AspeedMachineClass *amc =3D ASPEED_MACHINE_CLASS(mc); AspeedSoCClass *sc =3D ASPEED_SOC_CLASS(object_class_by_name(amc->soc_= name)); --=20 2.43.0