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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429c114c944sm4859142f8f.20.2025.10.31.11.33.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Oct 2025 11:33:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1761935626; x=1762540426; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=1GsqUplheU28z2VHmMdZVSwjMXPlWcvaPd3oIL/UheI=; b=pPl8CV2dUJpBVgyUTYf8PI1ZhJFwfiOHkONrQvFBXouYqD6xss7ePGDSi8wr33jffZ /bOM9uuYlSgQYIKY1dzmrXhZUyiVkd0nFPFPAMfZHxSzFlD9AoIArMMEM8QihrfeqUkb 2qtqviyAXYQ8U2EjK4oSt6GleBl7EnbJSD7jigL8EbXMi0/20EG7PmmKpiI6KSQCPxUW cC6WWin0P1zHFsdyyq6gwmbcSgn+yb5jeQJZFUnlasBOcKbky9edcEKja3mXAq/oJRlj xyCDmCD4WnwZdlAcxQ2vsOt9O579QkLcPYQeW0Zg/0flIOferVAj05cZVZtUc6ISZwpS v9cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761935626; x=1762540426; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1GsqUplheU28z2VHmMdZVSwjMXPlWcvaPd3oIL/UheI=; b=Mv2pod1zf0Q9ocP8Y6sWD+MjVKP13NOYM5TYZqSjDzuBmxmcGNx6aaBKIPVFGU7jXW TR0XYli7leUE+XgroovlVErW983kVFREdCklLqCdvYsPB5DD07piLriRY7MuvQBaT5KA 9hF3iD960NuY0/xxRvThYmJXhAkvQOqM1E99hHfDPhmC22sg545sCIQEXh7gv6GenOCR BeTn0UPKu2/AV1DlXKeOw7n0pPcRSf63DwMIFBDuhrf0rVCFpfbX5xQHrNb7G9FeE5BE M+h98m/Gl1sbLImDlyWQtfPwXuk8ZGg+aFsrJmjePzEX2qguTp5SVwuIxLfd7DAgKIuq 0flw== X-Gm-Message-State: AOJu0YwuD3iPO6exfBnPP3xU2GPtaqR9G0cH63KM4VVRj71f96kSz2he As1MXW8figzWAxEEUVfuju7B3uswrZxYl3HUGi3Ri2w6FKVRciUjQ9ZFMZILKNwGeTYpPxMtynr dQBqo X-Gm-Gg: ASbGncs8LR9h6UO6ETXl2iX4Cyq63xWht+Xmzf6VwChxxBqyLhQe1+g6AU57TBeGUDx tljBnwSoWVOLlWms0NhKow2LlzkyoIQiQpH9cDEitGxnHy1PKX2YzmLU4K9+eEam6bmSWDmy59N eFeiwwRdrwMFMhL9OnFQWAKuzz/8KA4NtXBkqw7qmMlKhp1szZ+778Ou0IGCg+/33TW5dW3R1n5 vFdcYx4X5yDWzbCnN3u+S5GNzmAk2bt8uzWRPMXt9QmPDG4TsM6oMYWnz8AEnTtXM+csm+0kmA3 fv5Jc04i8RXoeAGvb32UBeYEHCDlgCUKP2r1yAG8OlUhui6La9VWxmmEZf0I29k9tnx9LH5Z3eC K6tXbnlJNNPdWM3Er7lYS68Iqw1xXt9qCvTy9w8jeXGORIVpvgKkhtqugoM5dAH432mIg8cgUPR 6+Gv38l3rpWEpdN9ER X-Google-Smtp-Source: AGHT+IGHbCBKBpCScV3qeEbK7X+6hToD1chbyL4j/wL9aEmduf9HOalQ2d0AynE37oMJQl0oG3uFaw== X-Received: by 2002:a05:600c:5249:b0:456:1b6f:c888 with SMTP id 5b1f17b1804b1-47730870ba1mr45148005e9.23.1761935626590; Fri, 31 Oct 2025 11:33:46 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 36/38] target/arm: Share ARM_PSCI_CALL trace event between TCG and HVF Date: Fri, 31 Oct 2025 18:33:08 +0000 Message-ID: <20251031183310.3778349-37-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251031183310.3778349-1-peter.maydell@linaro.org> References: <20251031183310.3778349-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1761935914263158500 From: Philippe Mathieu-Daud=C3=A9 It is useful to compare PSCI calls of the same guest running under TCG or HVF. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/hvf/hvf.c | 3 ++- target/arm/tcg/psci.c | 3 +++ target/arm/trace-events | 3 +++ 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index a3bb71e63b9..f31b6e54ee7 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -34,6 +34,7 @@ #include "target/arm/internals.h" #include "target/arm/multiprocessing.h" #include "target/arm/gtimer.h" +#include "target/arm/trace.h" #include "trace.h" #include "migration/vmstate.h" =20 @@ -1025,7 +1026,7 @@ static bool hvf_handle_psci_call(CPUState *cpu) int target_el =3D 1; int32_t ret =3D 0; =20 - trace_hvf_psci_call(param[0], param[1], param[2], param[3], + trace_arm_psci_call(param[0], param[1], param[2], param[3], arm_cpu_mp_affinity(arm_cpu)); =20 switch (param[0]) { diff --git a/target/arm/tcg/psci.c b/target/arm/tcg/psci.c index cabed43e8a8..2d409301578 100644 --- a/target/arm/tcg/psci.c +++ b/target/arm/tcg/psci.c @@ -25,6 +25,7 @@ #include "internals.h" #include "arm-powerctl.h" #include "target/arm/multiprocessing.h" +#include "target/arm/trace.h" =20 bool arm_is_psci_call(ARMCPU *cpu, int excp_type) { @@ -79,6 +80,8 @@ void arm_handle_psci_call(ARMCPU *cpu) */ param[i] =3D is_a64(env) ? env->xregs[i] : env->regs[i]; } + trace_arm_psci_call(param[0], param[1], param[2], param[3], + arm_cpu_mp_affinity(cpu)); =20 if ((param[0] & QEMU_PSCI_0_2_64BIT) && !is_a64(env)) { ret =3D QEMU_PSCI_RET_NOT_SUPPORTED; diff --git a/target/arm/trace-events b/target/arm/trace-events index 72a2c7d0969..676d29fe516 100644 --- a/target/arm/trace-events +++ b/target/arm/trace-events @@ -23,3 +23,6 @@ arm_powerctl_set_cpu_on(uint64_t mp_aff, unsigned target_= el, const char *mode, u arm_powerctl_set_cpu_on_and_reset(uint64_t mp_aff) "cpu %" PRIu64 arm_powerctl_set_cpu_off(uint64_t mp_aff) "cpu %" PRIu64 arm_powerctl_reset_cpu(uint64_t mp_aff) "cpu %" PRIu64 + +# tcg/psci.c and hvf/hvf.c +arm_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t= cpuid) "PSCI Call x0=3D0x%016"PRIx64" x1=3D0x%016"PRIx64" x2=3D0x%016"PRIx= 64" x3=3D0x%016"PRIx64" cpuid=3D0x%x" --=20 2.43.0