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charset="utf-8" From: Suravee Suthikulpanit "Set" function tracks VFIO devices in the hash table. This is useful when looking up per-device host IOMMU information later on. Signed-off-by: Suravee Suthikulpanit Signed-off-by: Sairaj Kodilkar --- hw/i386/amd_iommu.c | 71 +++++++++++++++++++++++++++++++++++++++++++++ hw/i386/amd_iommu.h | 8 +++++ 2 files changed, 79 insertions(+) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 378e0cb55eab..8b146f4d33d2 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -382,6 +382,22 @@ static guint amdvi_uint64_hash(gconstpointer v) return (guint)*(const uint64_t *)v; } =20 +static guint amdvi_dte_hash(gconstpointer v) +{ + const struct AMDVI_dte_key *key =3D v; + guint value =3D (guint)(uintptr_t)key->bus; + + return (guint)(value << 8 | key->devfn); +} + +static gboolean amdvi_dte_equal(gconstpointer v1, gconstpointer v2) +{ + const struct AMDVI_dte_key *key1 =3D v1; + const struct AMDVI_dte_key *key2 =3D v2; + + return (key1->bus =3D=3D key2->bus) && (key1->devfn =3D=3D key2->devfn= ); +} + static AMDVIIOTLBEntry *amdvi_iotlb_lookup(AMDVIState *s, hwaddr addr, uint64_t devid) { @@ -2291,8 +2307,60 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bu= s, void *opaque, int devfn) return &iommu_as[devfn]->as; } =20 +static bool amdvi_set_iommu_device(PCIBus *bus, void *opaque, int devfn, + HostIOMMUDevice *hiod, Error **errp) +{ + AMDVIState *s =3D opaque; + struct AMDVI_dte_key *new_key; + struct AMDVI_dte_key key =3D { + .bus =3D bus, + .devfn =3D devfn, + }; + + assert(hiod); + assert(0 <=3D devfn && devfn < PCI_DEVFN_MAX); + + if (g_hash_table_lookup(s->hiod_hash, &key)) { + error_setg(errp, "Host IOMMU device already exist"); + return false; + } + + if (hiod->caps.type !=3D IOMMU_HW_INFO_TYPE_AMD && + hiod->caps.type !=3D IOMMU_HW_INFO_TYPE_DEFAULT) { + error_setg(errp, "IOMMU hardware is not compatible"); + return false; + } + + new_key =3D g_malloc(sizeof(*new_key)); + new_key->bus =3D bus; + new_key->devfn =3D devfn; + + object_ref(hiod); + g_hash_table_insert(s->hiod_hash, new_key, hiod); + + return true; +} + +static void amdvi_unset_iommu_device(PCIBus *bus, void *opaque, + int devfn) +{ + AMDVIState *s =3D opaque; + struct AMDVI_dte_key key =3D { + .bus =3D bus, + .devfn =3D devfn, + }; + + if (!g_hash_table_lookup(s->hiod_hash, &key)) { + return; + } + + g_hash_table_remove(s->hiod_hash, &key); +} + static const PCIIOMMUOps amdvi_iommu_ops =3D { .get_address_space =3D amdvi_host_dma_iommu, + .set_iommu_device =3D amdvi_set_iommu_device, + .unset_iommu_device =3D amdvi_unset_iommu_device, }; =20 static const MemoryRegionOps mmio_mem_ops =3D { @@ -2510,6 +2578,9 @@ static void amdvi_sysbus_realize(DeviceState *dev, Er= ror **errp) s->iotlb =3D g_hash_table_new_full(amdvi_uint64_hash, amdvi_uint64_equal, g_free, g_free); =20 + s->hiod_hash =3D g_hash_table_new_full(amdvi_dte_hash, + amdvi_dte_equal, g_free, g_free); + /* set up MMIO */ memory_region_init_io(&s->mr_mmio, OBJECT(s), &mmio_mem_ops, s, "amdvi-mmio", AMDVI_MMIO_SIZE); diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h index daf82fc85f96..e6f6902fe06d 100644 --- a/hw/i386/amd_iommu.h +++ b/hw/i386/amd_iommu.h @@ -358,6 +358,11 @@ struct AMDVIPCIState { uint32_t capab_offset; /* capability offset pointer */ }; =20 +struct AMDVI_dte_key { + PCIBus *bus; + uint8_t devfn; +}; + struct AMDVIState { X86IOMMUState iommu; /* IOMMU bus device */ AMDVIPCIState *pci; /* IOMMU PCI device */ @@ -416,6 +421,9 @@ struct AMDVIState { /* IOTLB */ GHashTable *iotlb; =20 + /* HostIOMMUDevice hash table*/ + GHashTable *hiod_hash; + /* Interrupt remapping */ bool ga_enabled; bool xtsup; --=20 2.34.1