From nobody Wed Nov 5 02:59:49 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1761712732; cv=none; d=zohomail.com; s=zohoarc; b=Y0JrJsso7OySUD4sv8t2GV9etQfqYiBM4D5ZBvLpnXfqzpdlrZt8+7BqVBR0kkNUnwTY/ldzpEPC7FzzC7VPY5+eoPhgDegKk+FNhg/fBVKmuIYNzH7rUQJX0Z/ynHAQsS8NvnX4/kwwxuGZaQcL9MY4pKuG0WLKj5/f3Xgwpy8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1761712732; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=i7YJIttXvJ5ZnTcRoew5iYfA+f1utQBwKAG6gS8MT6E=; b=a9vGjhuZ++8zx4Gm4zK/0oZM7T83pHD8GjcEFL8v/mJmmPGmHYbMADyR+JjZD5LopB437GlQnZmyIOj58l25MQMT5NjH81zKXkgggoBSnWBOSm5yZum8m3m80RmEFbBZp9FeELxAAK/RqvCr/ESjeAhm92regM45xUs32EatGLg= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1761712732922795.1538183157085; Tue, 28 Oct 2025 21:38:52 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vDxx4-0007iX-Us; Wed, 29 Oct 2025 00:38:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vDxwz-0007eR-O9; Wed, 29 Oct 2025 00:38:21 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vDxwt-0004M3-6y; Wed, 29 Oct 2025 00:38:21 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 29 Oct 2025 12:37:14 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 29 Oct 2025 12:37:14 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:All patches CC here" , "open list:ASPEED BMCs" CC: , , Subject: [PATCH v2 07/17] hw/arm/aspeed: Split Fuji machine into a separate source file for maintainability Date: Wed, 29 Oct 2025 12:36:53 +0800 Message-ID: <20251029043710.1486573-8-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251029043710.1486573-1-jamin_lin@aspeedtech.com> References: <20251029043710.1486573-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1761712735365158500 This commit moves the Facebook Fuji BMC machine implementation out of aspeed.c into a new standalone file aspeed_ast2600_fuji.c. This refactor continues the modularization effort for Aspeed platform suppo= rt, placing each board=E2=80=99s logic in its own dedicated source file. It improves maintainability, readability, and simplifies future development= for new platforms without cluttering aspeed.c. Key updates include: - Moved FUJI_BMC_HW_STRAP1 and FUJI_BMC_HW_STRAP2 macro definitions into th= e new file. - Moved fuji_bmc_i2c_init() and its helper get_pca9548_channels() into the = new file. - Moved aspeed_machine_fuji_class_init() and type registration to aspeed_as= t2600_fuji.c. - Added aspeed_ast2600_fuji.c to the build system (meson.build). - Cleaned up all Fuji-specific code and macros from aspeed.c. No functional changes. Signed-off-by: Jamin Lin --- hw/arm/aspeed.c | 116 ----------------------------- hw/arm/aspeed_ast2600_fuji.c | 139 +++++++++++++++++++++++++++++++++++ hw/arm/meson.build | 1 + 3 files changed, 140 insertions(+), 116 deletions(-) create mode 100644 hw/arm/aspeed_ast2600_fuji.c diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index d9b38fcc36..1f35706050 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -51,10 +51,6 @@ static struct arm_boot_info aspeed_board_binfo =3D { #define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_= EMMC) #define RAINIER_BMC_HW_STRAP2 0x80000848 =20 -/* Fuji hardware value */ -#define FUJI_BMC_HW_STRAP1 0x00000000 -#define FUJI_BMC_HW_STRAP2 0x00000000 - /* GB200NVL hardware value */ #define GB200NVL_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1 #define GB200NVL_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2 @@ -415,95 +411,8 @@ static void rainier_bmc_i2c_init(AspeedMachineState *b= mc) create_pca9552(soc, 15, 0x60); } =20 -static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr, - I2CBus **channels) -{ - I2CSlave *mux =3D i2c_slave_create_simple(bus, "pca9548", mux_addr); - for (int i =3D 0; i < 8; i++) { - channels[i] =3D pca954x_i2c_get_bus(mux, i); - } -} - #define TYPE_LM75 TYPE_TMP105 #define TYPE_TMP75 TYPE_TMP105 -#define TYPE_TMP422 "tmp422" - -static void fuji_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc =3D bmc->soc; - I2CBus *i2c[144] =3D {}; - - for (int i =3D 0; i < 16; i++) { - i2c[i] =3D aspeed_i2c_get_bus(&soc->i2c, i); - } - I2CBus *i2c180 =3D i2c[2]; - I2CBus *i2c480 =3D i2c[8]; - I2CBus *i2c600 =3D i2c[11]; - - get_pca9548_channels(i2c180, 0x70, &i2c[16]); - get_pca9548_channels(i2c480, 0x70, &i2c[24]); - /* NOTE: The device tree skips [32, 40) in the alias numbering */ - get_pca9548_channels(i2c600, 0x77, &i2c[40]); - get_pca9548_channels(i2c[24], 0x71, &i2c[48]); - get_pca9548_channels(i2c[25], 0x72, &i2c[56]); - get_pca9548_channels(i2c[26], 0x76, &i2c[64]); - get_pca9548_channels(i2c[27], 0x76, &i2c[72]); - for (int i =3D 0; i < 8; i++) { - get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]); - } - - i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c); - i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d); - - /* - * EEPROM 24c64 size is 64Kbits or 8 Kbytes - * 24c02 size is 2Kbits or 256 bytes - */ - at24c_eeprom_init(i2c[19], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[20], 0x50, 256); - at24c_eeprom_init(i2c[22], 0x52, 256); - - i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48); - i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49); - i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a); - i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c); - - at24c_eeprom_init(i2c[8], 0x51, 8 * KiB); - i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a); - - i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c); - at24c_eeprom_init(i2c[50], 0x52, 8 * KiB); - i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48); - i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49); - - i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48); - i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49); - - at24c_eeprom_init(i2c[65], 0x53, 8 * KiB); - i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49); - i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48); - at24c_eeprom_init(i2c[68], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[69], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[70], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[71], 0x52, 8 * KiB); - - at24c_eeprom_init(i2c[73], 0x53, 8 * KiB); - i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49); - i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48); - at24c_eeprom_init(i2c[76], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[77], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[78], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[79], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[28], 0x50, 256); - - for (int i =3D 0; i < 8; i++) { - at24c_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB); - i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48); - i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b); - i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a); - } -} - #define TYPE_TMP421 "tmp421" #define TYPE_DS1338 "ds1338" =20 @@ -954,27 +863,6 @@ static void aspeed_machine_rainier_class_init(ObjectCl= ass *oc, const void *data) aspeed_machine_ast2600_class_emmc_init(oc); }; =20 -#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) - -static void aspeed_machine_fuji_class_init(ObjectClass *oc, const void *da= ta) -{ - MachineClass *mc =3D MACHINE_CLASS(oc); - AspeedMachineClass *amc =3D ASPEED_MACHINE_CLASS(oc); - - mc->desc =3D "Facebook Fuji BMC (Cortex-A7)"; - amc->soc_name =3D "ast2600-a3"; - amc->hw_strap1 =3D FUJI_BMC_HW_STRAP1; - amc->hw_strap2 =3D FUJI_BMC_HW_STRAP2; - amc->fmc_model =3D "mx66l1g45g"; - amc->spi_model =3D "mx66l1g45g"; - amc->num_cs =3D 2; - amc->macs_mask =3D ASPEED_MAC3_ON; - amc->i2c_init =3D fuji_bmc_i2c_init; - amc->uart_default =3D ASPEED_DEV_UART1; - mc->default_ram_size =3D FUJI_BMC_RAM_SIZE; - aspeed_machine_class_init_cpus_defaults(mc); -}; - static void aspeed_machine_catalina_class_init(ObjectClass *oc, const void *data) { @@ -1211,10 +1099,6 @@ static const TypeInfo aspeed_machine_types[] =3D { .name =3D MACHINE_TYPE_NAME("rainier-bmc"), .parent =3D TYPE_ASPEED_MACHINE, .class_init =3D aspeed_machine_rainier_class_init, - }, { - .name =3D MACHINE_TYPE_NAME("fuji-bmc"), - .parent =3D TYPE_ASPEED_MACHINE, - .class_init =3D aspeed_machine_fuji_class_init, }, { .name =3D MACHINE_TYPE_NAME("gb200nvl-bmc"), .parent =3D TYPE_ASPEED_MACHINE, diff --git a/hw/arm/aspeed_ast2600_fuji.c b/hw/arm/aspeed_ast2600_fuji.c new file mode 100644 index 0000000000..78d234ca6f --- /dev/null +++ b/hw/arm/aspeed_ast2600_fuji.c @@ -0,0 +1,139 @@ +/* + * Facebook Fuji + * + * Copyright (C) 2025 ASPEED Technology Inc. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/i2c_mux_pca954x.h" +#include "hw/sensor/tmp105.h" +#include "hw/nvram/eeprom_at24c.h" + +#define TYPE_LM75 TYPE_TMP105 +#define TYPE_TMP75 TYPE_TMP105 +#define TYPE_TMP422 "tmp422" + +/* Fuji hardware value */ +#define FUJI_BMC_HW_STRAP1 0x00000000 +#define FUJI_BMC_HW_STRAP2 0x00000000 +#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) + +static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr, + I2CBus **channels) +{ + I2CSlave *mux =3D i2c_slave_create_simple(bus, "pca9548", mux_addr); + for (int i =3D 0; i < 8; i++) { + channels[i] =3D pca954x_i2c_get_bus(mux, i); + } +} + +static void fuji_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc =3D bmc->soc; + I2CBus *i2c[144] =3D {}; + + for (int i =3D 0; i < 16; i++) { + i2c[i] =3D aspeed_i2c_get_bus(&soc->i2c, i); + } + I2CBus *i2c180 =3D i2c[2]; + I2CBus *i2c480 =3D i2c[8]; + I2CBus *i2c600 =3D i2c[11]; + + get_pca9548_channels(i2c180, 0x70, &i2c[16]); + get_pca9548_channels(i2c480, 0x70, &i2c[24]); + /* NOTE: The device tree skips [32, 40) in the alias numbering */ + get_pca9548_channels(i2c600, 0x77, &i2c[40]); + get_pca9548_channels(i2c[24], 0x71, &i2c[48]); + get_pca9548_channels(i2c[25], 0x72, &i2c[56]); + get_pca9548_channels(i2c[26], 0x76, &i2c[64]); + get_pca9548_channels(i2c[27], 0x76, &i2c[72]); + for (int i =3D 0; i < 8; i++) { + get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]); + } + + i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c); + i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d); + + /* + * EEPROM 24c64 size is 64Kbits or 8 Kbytes + * 24c02 size is 2Kbits or 256 bytes + */ + at24c_eeprom_init(i2c[19], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[20], 0x50, 256); + at24c_eeprom_init(i2c[22], 0x52, 256); + + i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48); + i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49); + i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a); + i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c); + + at24c_eeprom_init(i2c[8], 0x51, 8 * KiB); + i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a); + + i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c); + at24c_eeprom_init(i2c[50], 0x52, 8 * KiB); + i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48); + i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49); + + i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48); + i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49); + + at24c_eeprom_init(i2c[65], 0x53, 8 * KiB); + i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49); + i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48); + at24c_eeprom_init(i2c[68], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[69], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[70], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[71], 0x52, 8 * KiB); + + at24c_eeprom_init(i2c[73], 0x53, 8 * KiB); + i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49); + i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48); + at24c_eeprom_init(i2c[76], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[77], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[78], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[79], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[28], 0x50, 256); + + for (int i =3D 0; i < 8; i++) { + at24c_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB); + i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48); + i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b); + i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a); + } +} + +static void aspeed_machine_fuji_class_init(ObjectClass *oc, const void *da= ta) +{ + MachineClass *mc =3D MACHINE_CLASS(oc); + AspeedMachineClass *amc =3D ASPEED_MACHINE_CLASS(oc); + + mc->desc =3D "Facebook Fuji BMC (Cortex-A7)"; + amc->soc_name =3D "ast2600-a3"; + amc->hw_strap1 =3D FUJI_BMC_HW_STRAP1; + amc->hw_strap2 =3D FUJI_BMC_HW_STRAP2; + amc->fmc_model =3D "mx66l1g45g"; + amc->spi_model =3D "mx66l1g45g"; + amc->num_cs =3D 2; + amc->macs_mask =3D ASPEED_MAC3_ON; + amc->i2c_init =3D fuji_bmc_i2c_init; + amc->uart_default =3D ASPEED_DEV_UART1; + mc->default_ram_size =3D FUJI_BMC_RAM_SIZE; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2600_fuji_types[] =3D { + { + .name =3D MACHINE_TYPE_NAME("fuji-bmc"), + .parent =3D TYPE_ASPEED_MACHINE, + .class_init =3D aspeed_machine_fuji_class_init, + }, +}; + +DEFINE_TYPES(aspeed_ast2600_fuji_types) + diff --git a/hw/arm/meson.build b/hw/arm/meson.build index 82ab04ff1c..c22b692260 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -59,6 +59,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( 'aspeed_ast2600.c', 'aspeed_ast2600_bletchley.c', 'aspeed_ast2600_fby35.c', + 'aspeed_ast2600_fuji.c', 'aspeed_ast10x0.c', 'aspeed_eeprom.c', 'fby35.c')) --=20 2.43.0