From nobody Wed Nov 5 02:59:49 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1761712724; cv=none; d=zohomail.com; s=zohoarc; b=fSesyUb9n3oT6k+uSCIkQF4A1UcMopeS1/DpQEEejuNmYWmPl0GQ3uSBSTnzmZspaLk2CwBgdIoTd8W58kInLw5V77wihD4nKB7ALiVcBsqPHKjMkbBfkz0W93VlK3mt3VYBxrzSHkGqLxg3nq48xwCsWDnf63HxmJ+LkjAb8wY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1761712724; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=yhnOLKsfrvek22yTBaN64/tLp7KBSLwoA62WJBBPmGc=; b=Gf7sA4s/qxufJQihD2oxqk2yeGXNK/TedWuLbVhxD41tEaSAVVXcMKa5t2Uu/dgcXXEpc4+DXkrqVCImVEEYPljrmus/e69atQOyQAeWQ7I6r/RxxS/dZ38Aq64/KgR/4e2GMCRtPZEjSSg6XJRa+JYuhUPxIJtDo21746xvYkE= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1761712724187582.634127477513; Tue, 28 Oct 2025 21:38:44 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vDxwf-0007GK-Vc; Wed, 29 Oct 2025 00:38:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vDxwe-0007G6-Pz; Wed, 29 Oct 2025 00:38:00 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vDxwb-0004M3-Kw; Wed, 29 Oct 2025 00:37:59 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 29 Oct 2025 12:37:12 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 29 Oct 2025 12:37:12 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:All patches CC here" , "open list:ASPEED BMCs" CC: , , Subject: [PATCH v2 04/17] hw/arm/aspeed: Move ASPEED_RAM_SIZE() macro to common header for reuse Date: Wed, 29 Oct 2025 12:36:50 +0800 Message-ID: <20251029043710.1486573-5-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251029043710.1486573-1-jamin_lin@aspeedtech.com> References: <20251029043710.1486573-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1761712727121154100 Content-Type: text/plain; charset="utf-8" Moving it into aspeed.h allows all Aspeed machine source files (AST2400, AST2500, AST2600, AST2700, etc.) to reuse the same macro definition for consistent behavior and maintainability. No functional changes. Signed-off-by: Jamin Lin --- include/hw/arm/aspeed.h | 7 +++++++ hw/arm/aspeed.c | 7 ------- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index fbe684d505..414c181c3a 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -25,6 +25,13 @@ DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineCl= ass, #define ASPEED_MAC2_ON (1 << 2) #define ASPEED_MAC3_ON (1 << 3) =20 +/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */ +#if HOST_LONG_BITS =3D=3D 32 +#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB) +#else +#define ASPEED_RAM_SIZE(sz) (sz) +#endif + struct AspeedMachineState { /* Private */ MachineState parent_obj; diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index f58245456a..690ad0be87 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -35,13 +35,6 @@ static struct arm_boot_info aspeed_board_binfo =3D { .board_id =3D -1, /* device-tree-only board */ }; =20 -/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */ -#if HOST_LONG_BITS =3D=3D 32 -#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB) -#else -#define ASPEED_RAM_SIZE(sz) (sz) -#endif - /* AST2600 evb hardware value */ #define AST2600_EVB_HW_STRAP1 0x000000C0 #define AST2600_EVB_HW_STRAP2 0x00000003 --=20 2.43.0