From nobody Mon Oct 27 14:14:19 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1761533106764315.47648164327575; Sun, 26 Oct 2025 19:45:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vDDDJ-0007SI-Tt; Sun, 26 Oct 2025 22:44:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vDDDG-0007Rs-CZ for qemu-devel@nongnu.org; Sun, 26 Oct 2025 22:44:03 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vDDDD-000397-5m for qemu-devel@nongnu.org; Sun, 26 Oct 2025 22:44:02 -0400 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Cx6tFn3P5oI+gaAA--.58523S3; Mon, 27 Oct 2025 10:43:51 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJCx2sBk3P5oDqUPAQ--.47601S4; Mon, 27 Oct 2025 10:43:50 +0800 (CST) From: Bibo Mao To: Song Gao , "Michael S . Tsirkin" , Cornelia Huck , Paolo Bonzini Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [PATCH v2 2/2] target/loongarch: Add PTW feature support in KVM mode Date: Mon, 27 Oct 2025 10:43:47 +0800 Message-Id: <20251027024347.3315592-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20251027024347.3315592-1-maobibo@loongson.cn> References: <20251027024347.3315592-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCx2sBk3P5oDqUPAQ--.47601S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1761533111976158500 Content-Type: text/plain; charset="utf-8" Implement Hardware page table walker(PTW for short) feature in KVM mode. Use OnOffAuto type variable ptw to check the PTW feature. If the PTW feature is not supported on KVM host, there is error reported with ptw=3Don option. By default PTW feature is disabled on la464 CPU type, and auto detected on max CPU type. Signed-off-by: Bibo Mao --- target/loongarch/cpu.c | 6 +++--- target/loongarch/cpu.h | 1 + target/loongarch/kvm/kvm.c | 35 +++++++++++++++++++++++++++++++++++ 3 files changed, 39 insertions(+), 3 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index e80a92fb2e..d74c3c3766 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -236,7 +236,7 @@ static void loongarch_set_ptw(Object *obj, bool value, = Error **errp) cpu->ptw =3D value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; =20 if (kvm_enabled()) { - /* PTW feature is only support in TCG mode now */ + /* kvm feature detection in function kvm_arch_init_vcpu */ return; } =20 @@ -406,14 +406,14 @@ static void loongarch_la132_initfn(Object *obj) static void loongarch_max_initfn(Object *obj) { LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); - /* '-cpu max' for TCG: we use cpu la464. */ + /* '-cpu max': use it for max supported CPU features */ loongarch_la464_initfn(obj); =20 + cpu->ptw =3D ON_OFF_AUTO_AUTO; if (tcg_enabled()) { cpu->env.cpucfg[1] =3D FIELD_DP32(cpu->env.cpucfg[1], CPUCFG1, MSG= _INT, 1); cpu->msgint =3D ON_OFF_AUTO_AUTO; cpu->env.cpucfg[2] =3D FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, HPT= W, 1); - cpu->ptw =3D ON_OFF_AUTO_AUTO; } } =20 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index b1d6799222..1a14469b3b 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -279,6 +279,7 @@ enum loongarch_features { LOONGARCH_FEATURE_PMU, LOONGARCH_FEATURE_PV_IPI, LOONGARCH_FEATURE_STEALTIME, + LOONGARCH_FEATURE_PTW, }; =20 typedef struct LoongArchBT { diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c index 4e4f4e79f6..26e40c9bdc 100644 --- a/target/loongarch/kvm/kvm.c +++ b/target/loongarch/kvm/kvm.c @@ -931,6 +931,12 @@ static bool kvm_feature_supported(CPUState *cs, enum l= oongarch_features feature) ret =3D kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); return (ret =3D=3D 0); =20 + case LOONGARCH_FEATURE_PTW: + attr.group =3D KVM_LOONGARCH_VM_FEAT_CTRL; + attr.attr =3D KVM_LOONGARCH_VM_FEAT_PTW; + ret =3D kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); + return (ret =3D=3D 0); + default: return false; } @@ -1029,6 +1035,29 @@ static int kvm_cpu_check_pmu(CPUState *cs, Error **e= rrp) return 0; } =20 +static int kvm_cpu_check_ptw(CPUState *cs, Error **errp) +{ + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + CPULoongArchState *env =3D cpu_env(cs); + bool kvm_supported; + + kvm_supported =3D kvm_feature_supported(cs, LOONGARCH_FEATURE_PTW); + if (cpu->ptw =3D=3D ON_OFF_AUTO_ON) { + if (!kvm_supported) { + error_setg(errp, "'ptw' feature not supported by KVM on the ho= st"); + return -ENOTSUP; + } + } else if (cpu->ptw !=3D ON_OFF_AUTO_AUTO) { + /* disable pmu if ON_OFF_AUTO_OFF is set */ + kvm_supported =3D false; + } + + if (kvm_supported) { + env->cpucfg[2] =3D FIELD_DP32(env->cpucfg[2], CPUCFG2, HPTW, 1); + } + return 0; +} + static int kvm_cpu_check_pv_features(CPUState *cs, Error **errp) { MachineState *ms =3D MACHINE(qdev_get_machine()); @@ -1123,6 +1152,12 @@ int kvm_arch_init_vcpu(CPUState *cs) return ret; } =20 + ret =3D kvm_cpu_check_ptw(cs, &local_err); + if (ret < 0) { + error_report_err(local_err); + return ret; + } + return 0; } =20 --=20 2.39.3