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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=harshpb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1761222085531158500 From: Philippe Mathieu-Daud=C3=A9 The SpaprMachineClass::nr_xirqs field was only used by the pseries-3.0 machine, which got removed. Remove it as now unused. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Link: https://lore.kernel.org/qemu-devel/20251021084346.73671-3-philmd@lina= ro.org Signed-off-by: Harsh Prateek Bora --- include/hw/ppc/spapr.h | 1 - hw/ppc/spapr.c | 1 - hw/ppc/spapr_irq.c | 22 +++++++--------------- 3 files changed, 7 insertions(+), 17 deletions(-) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 0c1e5132de..494367fb99 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -145,7 +145,6 @@ struct SpaprMachineClass { /*< public >*/ bool dr_phb_enabled; /* enable dynamic-reconfig/hotplug of PHBs = */ bool update_dt_enabled; /* enable KVMPPC_H_UPDATE_DT */ - uint32_t nr_xirqs; bool broken_host_serial_model; /* present real host info to the guest = */ bool pre_4_1_migration; /* don't migrate hpt-max-page-size */ bool linux_pci_probe; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 3728ae2a5e..7be7fdaed8 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -4691,7 +4691,6 @@ static void spapr_machine_class_init(ObjectClass *oc,= const void *data) smc->dr_phb_enabled =3D true; smc->linux_pci_probe =3D true; smc->smp_threads_vsmt =3D true; - smc->nr_xirqs =3D SPAPR_NR_XIRQS; xfc->match_nvt =3D spapr_match_nvt; vmc->client_architecture_support =3D spapr_vof_client_architecture_sup= port; vmc->quiesce =3D spapr_vof_quiesce; diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 317d57a380..2ce323457b 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -279,15 +279,11 @@ void spapr_irq_dt(SpaprMachineState *spapr, uint32_t = nr_servers, =20 uint32_t spapr_irq_nr_msis(SpaprMachineState *spapr) { - SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); - - return SPAPR_XIRQ_BASE + smc->nr_xirqs - SPAPR_IRQ_MSI; + return SPAPR_NR_XIRQS + SPAPR_XIRQ_BASE - SPAPR_IRQ_MSI; } =20 void spapr_irq_init(SpaprMachineState *spapr, Error **errp) { - SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); - if (kvm_enabled() && kvm_kernel_irqchip_split()) { error_setg(errp, "kernel_irqchip split mode not supported on pseri= es"); return; @@ -308,7 +304,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **e= rrp) object_property_add_child(OBJECT(spapr), "ics", obj); object_property_set_link(obj, ICS_PROP_XICS, OBJECT(spapr), &error_abort); - object_property_set_int(obj, "nr-irqs", smc->nr_xirqs, &error_abor= t); + object_property_set_int(obj, "nr-irqs", SPAPR_NR_XIRQS, &error_abo= rt); if (!qdev_realize(DEVICE(obj), NULL, errp)) { return; } @@ -322,7 +318,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **e= rrp) int i; =20 dev =3D qdev_new(TYPE_SPAPR_XIVE); - qdev_prop_set_uint32(dev, "nr-irqs", smc->nr_xirqs + SPAPR_IRQ_NR_= IPIS); + qdev_prop_set_uint32(dev, "nr-irqs", SPAPR_NR_XIRQS + SPAPR_IRQ_NR= _IPIS); /* * 8 XIVE END structures per CPU. One for each available * priority @@ -349,7 +345,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **e= rrp) } =20 spapr->qirqs =3D qemu_allocate_irqs(spapr_set_irq, spapr, - smc->nr_xirqs + SPAPR_IRQ_NR_IPIS); + SPAPR_NR_XIRQS + SPAPR_IRQ_NR_IPIS); =20 /* * Mostly we don't actually need this until reset, except that not @@ -364,11 +360,10 @@ int spapr_irq_claim(SpaprMachineState *spapr, int irq= , bool lsi, Error **errp) { SpaprInterruptController *intcs[] =3D ALL_INTCS(spapr); int i; - SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); int rc; =20 assert(irq >=3D SPAPR_XIRQ_BASE); - assert(irq < (smc->nr_xirqs + SPAPR_XIRQ_BASE)); + assert(irq < (SPAPR_NR_XIRQS + SPAPR_XIRQ_BASE)); =20 for (i =3D 0; i < ARRAY_SIZE(intcs); i++) { SpaprInterruptController *intc =3D intcs[i]; @@ -388,10 +383,9 @@ void spapr_irq_free(SpaprMachineState *spapr, int irq,= int num) { SpaprInterruptController *intcs[] =3D ALL_INTCS(spapr); int i, j; - SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); =20 assert(irq >=3D SPAPR_XIRQ_BASE); - assert((irq + num) <=3D (smc->nr_xirqs + SPAPR_XIRQ_BASE)); + assert((irq + num) <=3D (SPAPR_NR_XIRQS + SPAPR_XIRQ_BASE)); =20 for (i =3D irq; i < (irq + num); i++) { for (j =3D 0; j < ARRAY_SIZE(intcs); j++) { @@ -408,8 +402,6 @@ void spapr_irq_free(SpaprMachineState *spapr, int irq, = int num) =20 qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq) { - SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); - /* * This interface is basically for VIO and PHB devices to find the * right qemu_irq to manipulate, so we only allow access to the @@ -418,7 +410,7 @@ qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq) * interfaces, we can change this if we need to in future. */ assert(irq >=3D SPAPR_XIRQ_BASE); - assert(irq < (smc->nr_xirqs + SPAPR_XIRQ_BASE)); + assert(irq < (SPAPR_NR_XIRQS + SPAPR_XIRQ_BASE)); =20 if (spapr->ics) { assert(ics_valid_irq(spapr->ics, irq)); --=20 2.43.5