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Tsirkin" , Marcelo Tosatti , Marcel Apfelbaum , Paolo Bonzini , Sunil Muthuswamy , Zhao Liu , Richard Henderson , Fabiano Rosas , qemu-trivial@nongnu.org, Gerd Hoffmann , qemu-block@nongnu.org, Phil Dennis-Jordan , Michael Tokarev , John Snow , kvm@vger.kernel.org, Laurent Vivier , Bernhard Beschow Subject: [PATCH v2 08/11] hw/i386/apic: Ensure own APIC use in apic_msr_{read, write} Date: Fri, 17 Oct 2025 16:11:14 +0200 Message-ID: <20251017141117.105944-9-shentey@gmail.com> X-Mailer: git-send-email 2.51.1.dirty In-Reply-To: <20251017141117.105944-1-shentey@gmail.com> References: <20251017141117.105944-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=shentey@gmail.com; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1760710686267154100 Content-Type: text/plain; charset="utf-8" Avoids the `current_cpu` global and seems more robust by not "forgetting" t= he own APIC and then re-determining it by cpu_get_current_apic() which uses the global. Signed-off-by: Bernhard Beschow --- include/hw/i386/apic.h | 4 ++-- hw/intc/apic.c | 10 ++-------- target/i386/hvf/hvf.c | 4 ++-- target/i386/tcg/system/misc_helper.c | 5 +++-- 4 files changed, 9 insertions(+), 14 deletions(-) diff --git a/include/hw/i386/apic.h b/include/hw/i386/apic.h index 871f142888..6a0933f401 100644 --- a/include/hw/i386/apic.h +++ b/include/hw/i386/apic.h @@ -19,8 +19,8 @@ void apic_sipi(APICCommonState *s); void apic_poll_irq(APICCommonState *s); void apic_designate_bsp(APICCommonState *s, bool bsp); int apic_get_highest_priority_irr(APICCommonState *s); -int apic_msr_read(int index, uint64_t *val); -int apic_msr_write(int index, uint64_t val); +int apic_msr_read(APICCommonState *s, int index, uint64_t *val); +int apic_msr_write(APICCommonState *s, int index, uint64_t val); bool is_x2apic_mode(APICCommonState *s); =20 /* pc.c */ diff --git a/hw/intc/apic.c b/hw/intc/apic.c index cb35c80c75..ba0eda3921 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -881,11 +881,8 @@ static uint64_t apic_mem_read(void *opaque, hwaddr add= r, unsigned size) return val; } =20 -int apic_msr_read(int index, uint64_t *val) +int apic_msr_read(APICCommonState *s, int index, uint64_t *val) { - APICCommonState *s; - - s =3D cpu_get_current_apic(); if (!s) { return -1; } @@ -1079,11 +1076,8 @@ static void apic_mem_write(void *opaque, hwaddr addr= , uint64_t val, apic_register_write(index, val); } =20 -int apic_msr_write(int index, uint64_t val) +int apic_msr_write(APICCommonState *s, int index, uint64_t val) { - APICCommonState *s; - - s =3D cpu_get_current_apic(); if (!s) { return -1; } diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 8445cadece..33f723a76a 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -527,7 +527,7 @@ void hvf_simulate_rdmsr(CPUState *cs) int ret; int index =3D (uint32_t)env->regs[R_ECX] - MSR_APIC_START; =20 - ret =3D apic_msr_read(index, &val); + ret =3D apic_msr_read(cpu->apic_state, index, &val); if (ret < 0) { x86_emul_raise_exception(env, EXCP0D_GPF, 0); } @@ -638,7 +638,7 @@ void hvf_simulate_wrmsr(CPUState *cs) int ret; int index =3D (uint32_t)env->regs[R_ECX] - MSR_APIC_START; =20 - ret =3D apic_msr_write(index, data); + ret =3D apic_msr_write(cpu->apic_state, index, data); if (ret < 0) { x86_emul_raise_exception(env, EXCP0D_GPF, 0); } diff --git a/target/i386/tcg/system/misc_helper.c b/target/i386/tcg/system/= misc_helper.c index 9c3f5cc99b..360e0e71f0 100644 --- a/target/i386/tcg/system/misc_helper.c +++ b/target/i386/tcg/system/misc_helper.c @@ -132,6 +132,7 @@ void helper_write_crN(CPUX86State *env, int reg, target= _ulong t0) void helper_wrmsr(CPUX86State *env) { uint64_t val; + X86CPU *x86_cpu =3D env_archcpu(env); CPUState *cs =3D env_cpu(env); =20 cpu_svm_check_intercept_param(env, SVM_EXIT_MSR, 1, GETPC()); @@ -299,7 +300,7 @@ void helper_wrmsr(CPUX86State *env) int index =3D (uint32_t)env->regs[R_ECX] - MSR_APIC_START; =20 bql_lock(); - ret =3D apic_msr_write(index, val); + ret =3D apic_msr_write(x86_cpu->apic_state, index, val); bql_unlock(); if (ret < 0) { goto error; @@ -477,7 +478,7 @@ void helper_rdmsr(CPUX86State *env) int index =3D (uint32_t)env->regs[R_ECX] - MSR_APIC_START; =20 bql_lock(); - ret =3D apic_msr_read(index, &val); + ret =3D apic_msr_read(x86_cpu->apic_state, index, &val); bql_unlock(); if (ret < 0) { raise_exception_err_ra(env, EXCP0D_GPF, 0, GETPC()); --=20 2.51.1.dirty