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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=94.130.142.21; envelope-from=anjo@rev.ng; helo=rev.ng X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Anton Johansson From: Anton Johansson via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1760534918762158500 Signed-off-by: Anton Johansson --- include/hw/riscv/boot.h | 20 ++++++++++---------- hw/riscv/boot.c | 22 +++++++++++----------- hw/riscv/microchip_pfsoc.c | 2 +- hw/riscv/sifive_u.c | 2 +- hw/riscv/spike.c | 4 ++-- hw/riscv/virt.c | 2 +- 6 files changed, 26 insertions(+), 26 deletions(-) diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 7d59b2e6c6..d835594baa 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -43,21 +43,21 @@ bool riscv_is_32bit(RISCVHartArrayState *harts); char *riscv_plic_hart_config_string(int hart_count); =20 void riscv_boot_info_init(RISCVBootInfo *info, RISCVHartArrayState *harts); -target_ulong riscv_calc_kernel_start_addr(RISCVBootInfo *info, - target_ulong firmware_end_addr); -target_ulong riscv_find_and_load_firmware(MachineState *machine, - const char *default_machine_firm= ware, - hwaddr *firmware_load_addr, - symbol_fn_t sym_cb); +hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info, + hwaddr firmware_end_addr); +hwaddr riscv_find_and_load_firmware(MachineState *machine, + const char *default_machine_firmware, + hwaddr *firmware_load_addr, + symbol_fn_t sym_cb); const char *riscv_default_firmware_name(RISCVHartArrayState *harts); char *riscv_find_firmware(const char *firmware_filename, const char *default_machine_firmware); -target_ulong riscv_load_firmware(const char *firmware_filename, - hwaddr *firmware_load_addr, - symbol_fn_t sym_cb); +hwaddr riscv_load_firmware(const char *firmware_filename, + hwaddr *firmware_load_addr, + symbol_fn_t sym_cb); void riscv_load_kernel(MachineState *machine, RISCVBootInfo *info, - target_ulong kernel_start_addr, + hwaddr kernel_start_addr, bool load_initrd, symbol_fn_t sym_cb); uint64_t riscv_compute_fdt_addr(hwaddr dram_base, hwaddr dram_size, diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 828a867be3..4eadcff26c 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -74,8 +74,8 @@ void riscv_boot_info_init(RISCVBootInfo *info, RISCVHartA= rrayState *harts) info->is_32bit =3D riscv_is_32bit(harts); } =20 -target_ulong riscv_calc_kernel_start_addr(RISCVBootInfo *info, - target_ulong firmware_end_addr) { +hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info, + hwaddr firmware_end_addr) { if (info->is_32bit) { return QEMU_ALIGN_UP(firmware_end_addr, 4 * MiB); } else { @@ -133,13 +133,13 @@ char *riscv_find_firmware(const char *firmware_filena= me, return filename; } =20 -target_ulong riscv_find_and_load_firmware(MachineState *machine, - const char *default_machine_firm= ware, - hwaddr *firmware_load_addr, - symbol_fn_t sym_cb) +hwaddr riscv_find_and_load_firmware(MachineState *machine, + const char *default_machine_firmware, + hwaddr *firmware_load_addr, + symbol_fn_t sym_cb) { char *firmware_filename; - target_ulong firmware_end_addr =3D *firmware_load_addr; + hwaddr firmware_end_addr =3D *firmware_load_addr; =20 firmware_filename =3D riscv_find_firmware(machine->firmware, default_machine_firmware); @@ -154,9 +154,9 @@ target_ulong riscv_find_and_load_firmware(MachineState = *machine, return firmware_end_addr; } =20 -target_ulong riscv_load_firmware(const char *firmware_filename, - hwaddr *firmware_load_addr, - symbol_fn_t sym_cb) +hwaddr riscv_load_firmware(const char *firmware_filename, + hwaddr *firmware_load_addr, + symbol_fn_t sym_cb) { uint64_t firmware_entry, firmware_end; ssize_t firmware_size; @@ -227,7 +227,7 @@ static void riscv_load_initrd(MachineState *machine, RI= SCVBootInfo *info) =20 void riscv_load_kernel(MachineState *machine, RISCVBootInfo *info, - target_ulong kernel_start_addr, + hwaddr kernel_start_addr, bool load_initrd, symbol_fn_t sym_cb) { diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c index 2e74783fce..e5a0196a00 100644 --- a/hw/riscv/microchip_pfsoc.c +++ b/hw/riscv/microchip_pfsoc.c @@ -515,7 +515,7 @@ static void microchip_icicle_kit_machine_init(MachineSt= ate *machine) uint64_t mem_low_size, mem_high_size; hwaddr firmware_load_addr; const char *firmware_name; - target_ulong firmware_end_addr, kernel_start_addr; + hwaddr firmware_end_addr, kernel_start_addr; uint64_t kernel_entry; uint64_t fdt_load_addr; DriveInfo *dinfo =3D drive_get(IF_SD, 0, 0); diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index d69f942cfb..390f9b8d9a 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -515,7 +515,7 @@ static void sifive_u_machine_init(MachineState *machine) MemoryRegion *system_memory =3D get_system_memory(); MemoryRegion *flash0 =3D g_new(MemoryRegion, 1); hwaddr start_addr =3D memmap[SIFIVE_U_DEV_DRAM].base; - target_ulong firmware_end_addr, kernel_start_addr; + hwaddr firmware_end_addr, kernel_start_addr; const char *firmware_name; uint32_t start_addr_hi32 =3D 0x00000000; uint32_t fdt_load_addr_hi32 =3D 0x00000000; diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 641aae8c01..b0bab3fe00 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -197,9 +197,9 @@ static void spike_board_init(MachineState *machine) SpikeState *s =3D SPIKE_MACHINE(machine); MemoryRegion *system_memory =3D get_system_memory(); MemoryRegion *mask_rom =3D g_new(MemoryRegion, 1); - target_ulong firmware_end_addr =3D memmap[SPIKE_DRAM].base; + hwaddr firmware_end_addr =3D memmap[SPIKE_DRAM].base; hwaddr firmware_load_addr =3D memmap[SPIKE_DRAM].base; - target_ulong kernel_start_addr; + hwaddr kernel_start_addr; char *firmware_name; uint64_t fdt_load_addr; uint64_t kernel_entry; diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 47e573f85a..17909206c7 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1434,7 +1434,7 @@ static void virt_machine_done(Notifier *notifier, voi= d *data) machine_done); MachineState *machine =3D MACHINE(s); hwaddr start_addr =3D s->memmap[VIRT_DRAM].base; - target_ulong firmware_end_addr, kernel_start_addr; + hwaddr firmware_end_addr, kernel_start_addr; const char *firmware_name =3D riscv_default_firmware_name(&s->soc[0]); uint64_t fdt_load_addr; uint64_t kernel_entry =3D 0; --=20 2.51.0