From nobody Thu Oct 16 04:32:33 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1760474044; cv=none; d=zohomail.com; s=zohoarc; b=gaLXmtSsPGxQOfTgjjGK5+Ob7QbI2N08jF6c048JYp1D/CCP49Q1/Vz02bkKdS8uMowQw1sn8pNKYR0qXgLQINiqPi/rNsBSaY8IvMrzA5nrEtXQSU2l2FIDh3TTutlrX3gB56KTgSnqK4JW1KBnSjsqj6WeDcajgUrIFyCY8ls= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1760474044; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=Eau0wq8sV/2my43Apu9FyG6rrRSYcV2FlyNHl8TiVlA=; b=NLj0vDe5iVDUzbzVUqoFF62tvu9oCUIsQjyoMSnJvo/sOy5SinCrJ2MaAgTpjgU9BfGwF2LLfRjKeYje2dW2IV2ZjA3nZKdbiTztTUXe85H65QGtnsYXwBnhRTNzugSeBpCM602wdSRl7IID3TwO2XQ0+HQRFLQCAcmJEPM2NDw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1760474044054954.6425233105813; Tue, 14 Oct 2025 13:34:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v8lhf-0000nn-5A; Tue, 14 Oct 2025 16:33:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v8lhc-0000nG-Hw for qemu-devel@nongnu.org; Tue, 14 Oct 2025 16:33:00 -0400 Received: from rev.ng ([94.130.142.21]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v8lhY-0000PZ-KS for qemu-devel@nongnu.org; Tue, 14 Oct 2025 16:33:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=rev.ng; s=dkim; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive:List-Unsubscribe:List-Unsubscribe-Post: List-Help; bh=Eau0wq8sV/2my43Apu9FyG6rrRSYcV2FlyNHl8TiVlA=; b=kxW+ga1yMYrrRmr pxJWlJ8IKQC139kbuTmwqalfoLWqK41ZpmXCCi5aZMK86Gk7wz/GD28VsIY2jR21yDNLJwN7Sp54o vhNk+V1cOjW4pk687j+Kp8NoIpTOeCEmKSVXTg0q/eX/WpO4ejecqCK9BQmte56t6AU2M4xiRUfVl UA=; To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, philmd@linaro.org, alistair.francis@wdc.com, palmer@dabbelt.com Subject: [PATCH v3 03/34] target/riscv: Fix size of mhartid Date: Tue, 14 Oct 2025 22:34:40 +0200 Message-ID: <20251014203512.26282-4-anjo@rev.ng> In-Reply-To: <20251014203512.26282-1-anjo@rev.ng> References: <20251014203512.26282-1-anjo@rev.ng> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=94.130.142.21; envelope-from=anjo@rev.ng; helo=rev.ng X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Anton Johansson From: Anton Johansson via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1760474049001158500 Content-Type: text/plain; charset="utf-8" and update formatting in log. Signed-off-by: Anton Johansson Reviewed-by: Pierrick Bouvier Reviewed-by: Alistair Francis --- target/riscv/cpu.h | 2 +- target/riscv/cpu_helper.c | 2 +- target/riscv/machine.c | 2 +- target/riscv/tcg/tcg-cpu.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 4b291dbf81..25f996985b 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -279,7 +279,7 @@ struct CPUArchState { target_ulong geilen; uint64_t resetvec; =20 - target_ulong mhartid; + uint64_t mhartid; /* * For RV32 this is 32-bit mstatus and 32-bit mstatush. * For RV64 this is a 64-bit mstatus. diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 3479a62cc7..9d0683f200 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -2278,7 +2278,7 @@ void riscv_cpu_do_interrupt(CPUState *cs) riscv_cpu_get_trap_name(cause, async)); =20 qemu_log_mask(CPU_LOG_INT, - "%s: hart:"TARGET_FMT_ld", async:%d, cause:"TARGET_FMT_l= x", " + "%s: hart:%"PRIu64", async:%d, cause:"TARGET_FMT_lx", " "epc:0x"TARGET_FMT_lx", tval:0x"TARGET_FMT_lx", desc=3D%= s\n", __func__, env->mhartid, async, cause, env->pc, tval, riscv_cpu_get_trap_name(cause, async)); diff --git a/target/riscv/machine.c b/target/riscv/machine.c index f6ca017211..ab0bc32e1f 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -450,7 +450,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { VMSTATE_UINTTL(env.priv, RISCVCPU), VMSTATE_BOOL(env.virt_enabled, RISCVCPU), VMSTATE_UINT64(env.resetvec, RISCVCPU), - VMSTATE_UINTTL(env.mhartid, RISCVCPU), + VMSTATE_UINT64(env.mhartid, RISCVCPU), VMSTATE_UINT64(env.mstatus, RISCVCPU), VMSTATE_UINT64(env.mip, RISCVCPU), VMSTATE_UINT64(env.miclaim, RISCVCPU), diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 1150bd1469..db3cbc1625 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -487,7 +487,7 @@ static void riscv_cpu_disable_priv_spec_isa_exts(RISCVC= PU *cpu) continue; } #ifndef CONFIG_USER_ONLY - warn_report("disabling %s extension for hart 0x" TARGET_FMT_lx + warn_report("disabling %s extension for hart 0x%" PRIx64 " because privilege spec version does not match", edata->name, env->mhartid); #else --=20 2.51.0