From nobody Fri Nov 14 18:26:44 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1760423856871878.754876206843; Mon, 13 Oct 2025 23:37:36 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v8Yec-00035P-Na; Tue, 14 Oct 2025 02:37:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v8YeZ-00034l-8p; Tue, 14 Oct 2025 02:36:59 -0400 Received: from isrv.corpit.ru ([212.248.84.144]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v8YeW-0006Sy-GJ; Tue, 14 Oct 2025 02:36:59 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id B38EB15D3C8; Tue, 14 Oct 2025 09:36:32 +0300 (MSK) Received: from think4mjt.tls.msk.ru (mjtthink.wg.tls.msk.ru [192.168.177.146]) by tsrv.corpit.ru (Postfix) with ESMTP id A96DA29F295; Tue, 14 Oct 2025 09:36:52 +0300 (MSK) From: Michael Tokarev To: qemu-devel@nongnu.org, Zhao Liu , Paolo Bonzini Cc: Michael Tokarev , qemu-stable@nongnu.org, hector.cao@canonical.com, lk@c--e.de, berrange@redhat.com, Peter Maydell Subject: [PATCH] target/i386: move arch_capabilities & pdcm compatibility properties from 10.0 to 9.2 machine type Date: Tue, 14 Oct 2025 09:36:47 +0300 Message-ID: <20251014063650.25057-1-mjt@tls.msk.ru> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=212.248.84.144; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1760423876678158500 Content-Type: text/plain; charset="utf-8" The two compat properties, introduced by the following commits (f): e9efa4a771 target/i386: add compatibility property for arch_capabilities 6529f31e0d target/i386: add compatibility property for pdcm feature were added to address migration issues after the following commits (c10.1): d3a24134e3 target/i386: do not expose ARCH_CAPABILITIES on AMD CPU e68ec29809 i386/cpu: Move adjustment of CPUID_EXT_PDCM before feature_depe= ndencies[] check which were added in 10.1 and broke migration from 10.0 to 10.1. However, the 2 changes which required the compat properties, were mistakenly cherry-picked to 10.0.x stable branch (c10.0): 24778b1c7e target/i386: do not expose ARCH_CAPABILITIES on AMD CPU 3d26cb65c2 i386/cpu: Move adjustment of CPUID_EXT_PDCM before feature_depe= ndencies[] check and were released as v10.0.4 (and v10.0.5). This breaks migration from earlier versions to 10.0.4 the same way as it's broken for 10.1 where the two fixes (f) are needed. However, reverting c10.0 commits from the 10.0.x stable branch will make that branch further incompatible with itself again, in an opposite way. It might be better to accept the current situation and "pretend" that the c10.0 commits has "always" been in 10.0 branch. So the fixups (f) are needed for both 10.0 and 10.1 branches to preserve migration compatibility from the earlier versions and between 10.0 & 10.1 & next. So the fixup commits (f) can be applied to both branches, and on top of that, adjust the machine version for the compat properties from 10.0 to the previous, 9.2, machine type. This is what this change does. Signed-off-by: Michael Tokarev --- Note1: this is an alternative to reverting the two changes (c10.0) from the 10.0.x branch. If accepted, this will be the first time in history when we modify machine properties retrospectively (or I think so, maybe there were other case like this already). Note2: I still don't understand the implications of this migration stuff, - what exactly is broken now and what will be broken if this change is accepted, or if (c10.0) are reverted. We've quite a matrix here: 10.0.3 and before 10.0.4, 10.0.5 (with c10.0 applied) 10.0.6 and up (with the fix, either revert of (c10.0) or with 2 fixups on= top) 10.1.1 and before (before (f) is applied) 10.1.2 and up (with (f) applied and maybe with this fixup applied too) This set is multiplied further by the number of possible machine versions used in particular setup - if it was -m pc-10.0 or -m pc-10.1. We also have backwards migration but I don't care about it at this time. Note3: It'd be best if we can release a fixed set of versions sooner, so it's finally known which combination is broken for migration and in which way. Note4: due to my lack of understanding of the brokeness and its severity, I can't decide which way to go from here. It'd be really nice if I knew at least, like, 'a->b: dies at migration; c->d: migration succeeds, but some OSes might start misbehaving due to changed CPU properties' stuff about the above matrix, - this way, it will be possible to make a better decision. Thanks, and sorry for the breakage and the long post. hw/i386/pc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 4d6bcbb846..40fb12a3d2 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -87,12 +87,13 @@ const size_t pc_compat_10_1_len =3D G_N_ELEMENTS(pc_com= pat_10_1); GlobalProperty pc_compat_10_0[] =3D { { TYPE_X86_CPU, "x-consistent-cache", "false" }, { TYPE_X86_CPU, "x-vendor-cpuid-only-v2", "false" }, - { TYPE_X86_CPU, "x-arch-cap-always-on", "true" }, - { TYPE_X86_CPU, "x-pdcm-on-even-without-pmu", "true" }, }; const size_t pc_compat_10_0_len =3D G_N_ELEMENTS(pc_compat_10_0); =20 -GlobalProperty pc_compat_9_2[] =3D {}; +GlobalProperty pc_compat_9_2[] =3D { + { TYPE_X86_CPU, "x-arch-cap-always-on", "true" }, + { TYPE_X86_CPU, "x-pdcm-on-even-without-pmu", "true" }, +}; const size_t pc_compat_9_2_len =3D G_N_ELEMENTS(pc_compat_9_2); =20 GlobalProperty pc_compat_9_1[] =3D { --=20 2.47.3