From nobody Fri Nov 14 20:47:38 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1760334479; cv=none; d=zohomail.com; s=zohoarc; b=hYxlY178ZV38/DCObimTSOzffDSaZFkQOEgvbqwQ1Ck3pFPXgpRhbP8FaBDWb9qoMGWNlaT50PKxuVWWzLVUcjafdfsdK+yuKs1+SvwIv8TQWVeBF8QUhQ0t7wUNs+CREKjJE1Zr6qbTPklXdTYjftKP4wcUv3UxBOLl7Iz9cqU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1760334479; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=Rkx51ST7NGih0pNsb9U7824tbyqkk/pWfhLZgDOCGBc=; b=FwLdmitmJySfsE9iM/OTVh+CCZVq5hjR59/S/ob/qFxIh0Muojmeg4Az2fvZYLcghSo9Alo2JuW4Gp1U3hARCl7Tnh1LpEuIjj3xldpilFQfiKU7AzqsIRQTwzuuJztmjA7T4tfaDKNftstDlSpA29+GpXQ06Zobjl4/kWPRDpY= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1760334479438509.8246494492481; Sun, 12 Oct 2025 22:47:59 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v8BM1-0007yL-Ve; Mon, 13 Oct 2025 01:44:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v8BM0-0007y4-Nb; Mon, 13 Oct 2025 01:44:16 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v8BLx-0002DU-Lp; Mon, 13 Oct 2025 01:44:16 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 13 Oct 2025 13:43:37 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 13 Oct 2025 13:43:37 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , , Subject: [PATCH v3 08/16] hw/arm/aspeed: Remove the aspeed_soc_get_irq and class get_irq hook Date: Mon, 13 Oct 2025 13:43:20 +0800 Message-ID: <20251013054334.955331-9-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251013054334.955331-1-jamin_lin@aspeedtech.com> References: <20251013054334.955331-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1760334481382154100 Content-Type: text/plain; charset="utf-8" Remove the the common aspeed_soc_get_irq. Call sites are updated to use the SoC-specific get_irq helpers directly (aspeed_soc_ast1030_get_irq(), _aspeed2400_get_irq(), _ast2600_get_irq(), _ast27x0ssp_get_irq(), _ast27x0tsp_get_irq(), and _ast2700_get_irq()) This makes the IRQ lookup explicit per-SoC and drops the exported API that depended on AspeedSoCState, reducing cross-module coupling in the common layer. No functional change. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- include/hw/arm/aspeed_soc.h | 2 -- hw/arm/aspeed_ast10x0.c | 17 ++++++++--------- hw/arm/aspeed_ast2400.c | 31 +++++++++++++++---------------- hw/arm/aspeed_ast2600.c | 34 +++++++++++++++++----------------- hw/arm/aspeed_ast27x0-ssp.c | 3 +-- hw/arm/aspeed_ast27x0-tsp.c | 3 +-- hw/arm/aspeed_ast27x0.c | 27 +++++++++++++-------------- hw/arm/aspeed_soc_common.c | 5 ----- 8 files changed, 55 insertions(+), 67 deletions(-) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 47341ea2fd..0e07c079f0 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -198,7 +198,6 @@ struct AspeedSoCClass { const int *irqmap; const hwaddr *memmap; uint32_t num_cpus; - qemu_irq (*get_irq)(AspeedSoCState *s, int dev); bool (*boot_from_emmc)(AspeedSoCState *s); }; =20 @@ -303,7 +302,6 @@ enum { }; =20 const char *aspeed_soc_cpu_type(const char * const *valid_cpu_types); -qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev); bool aspeed_soc_uart_realize(MemoryRegion *memory, SerialMM *smm, const hwaddr addr, Error **errp); void aspeed_soc_uart_set_chr(SerialMM *uart, int dev, int uarts_base, diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index ff781379c1..7f49c13391 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -284,7 +284,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev= _soc, Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->peci), 0, sc->memmap[ASPEED_DEV_PECI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_PECI)); + aspeed_soc_ast1030_get_irq(s, ASPEED_DEV_PECI)); =20 /* LPC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->lpc), errp)) { @@ -295,7 +295,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev= _soc, Error **errp) =20 /* Connect the LPC IRQ to the GIC. It is otherwise unused. */ sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_LPC)); + aspeed_soc_ast1030_get_irq(s, ASPEED_DEV_LPC)); =20 /* * On the AST1030 LPC subdevice IRQs are connected straight to the GIC. @@ -323,7 +323,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev= _soc, Error **errp) return; } sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, - aspeed_soc_get_irq(s, uart)); + aspeed_soc_ast1030_get_irq(s, uart)); } =20 /* Timer */ @@ -335,7 +335,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev= _soc, Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->timerctrl), 0, sc->memmap[ASPEED_DEV_TIMER1]); for (i =3D 0; i < ASPEED_TIMER_NR_TIMERS; i++) { - qemu_irq irq =3D aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i); + qemu_irq irq =3D aspeed_soc_ast1030_get_irq(s, ASPEED_DEV_TIMER1 += i); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); } =20 @@ -346,7 +346,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev= _soc, Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_ADC)); + aspeed_soc_ast1030_get_irq(s, ASPEED_DEV_ADC)); =20 /* FMC, The number of CS is set at the board level */ object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(&s->sram), @@ -359,7 +359,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev= _soc, Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 1, ASPEED_SMC_GET_CLASS(&s->fmc)->flash_window_base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_FMC)); + aspeed_soc_ast1030_get_irq(s, ASPEED_DEV_FMC)); =20 /* SPI */ for (i =3D 0; i < sc->spis_num; i++) { @@ -390,7 +390,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev= _soc, Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->hace), 0, sc->memmap[ASPEED_DEV_HACE]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_HACE)); + aspeed_soc_ast1030_get_irq(s, ASPEED_DEV_HACE)); =20 /* Watch dog */ for (i =3D 0; i < sc->wdts_num; i++) { @@ -412,7 +412,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev= _soc, Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_DEV_GPIO]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); + aspeed_soc_ast1030_get_irq(s, ASPEED_DEV_GPIO)); =20 aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->pwm), "aspeed.pwm", @@ -463,7 +463,6 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *= klass, const void *data) sc->irqmap =3D aspeed_soc_ast1030_irqmap; sc->memmap =3D aspeed_soc_ast1030_memmap; sc->num_cpus =3D 1; - sc->get_irq =3D aspeed_soc_ast1030_get_irq; } =20 static const TypeInfo aspeed_soc_ast10x0_types[] =3D { diff --git a/hw/arm/aspeed_ast2400.c b/hw/arm/aspeed_ast2400.c index 8d4d6564c7..b1b826b7e0 100644 --- a/hw/arm/aspeed_ast2400.c +++ b/hw/arm/aspeed_ast2400.c @@ -313,7 +313,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_RTC)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_RTC)); =20 /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu), @@ -324,7 +324,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->timerctrl), 0, sc->memmap[ASPEED_DEV_TIMER1]); for (i =3D 0; i < ASPEED_TIMER_NR_TIMERS; i++) { - qemu_irq irq =3D aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i); + qemu_irq irq =3D aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_TIMER1 += i); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); } =20 @@ -335,7 +335,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_ADC)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_ADC)); =20 /* UART */ for (i =3D 0, uart =3D sc->uarts_base; i < sc->uarts_num; i++, uart++)= { @@ -344,7 +344,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) return; } sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, - aspeed_soc_get_irq(s, uart)); + aspeed_soc_ast2400_get_irq(s, uart)); } =20 /* I2C */ @@ -356,7 +356,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_I2C)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_I2C)); =20 /* PECI */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->peci), errp)) { @@ -365,7 +365,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->peci), 0, sc->memmap[ASPEED_DEV_PECI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_PECI)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_PECI)); =20 /* FMC, The number of CS is set at the board level */ object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(s->dram_mr), @@ -378,7 +378,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 1, ASPEED_SMC_GET_CLASS(&s->fmc)->flash_window_base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_FMC)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_FMC)); =20 /* Set up an alias on the FMC CE0 region (boot default) */ MemoryRegion *fmc0_mmio =3D &s->fmc.flashes[0].mmio; @@ -405,7 +405,8 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ehci[i]), 0, sc->memmap[ASPEED_DEV_EHCI1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i)); + aspeed_soc_ast2400_get_irq(s, + ASPEED_DEV_EHCI1 + i= )); } =20 /* SDMC - SDRAM Memory Controller */ @@ -443,7 +444,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, sc->memmap[ASPEED_DEV_ETH1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_ETH1 += i)); } =20 /* XDMA */ @@ -453,7 +454,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->xdma), 0, sc->memmap[ASPEED_DEV_XDMA]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_XDMA)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_XDMA)); =20 /* GPIO */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { @@ -462,7 +463,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_DEV_GPIO]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_GPIO)); =20 /* SDHCI */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { @@ -471,7 +472,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sdhci), 0, sc->memmap[ASPEED_DEV_SDHCI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_SDHCI)); =20 /* LPC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->lpc), errp)) { @@ -482,7 +483,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) =20 /* Connect the LPC IRQ to the VIC */ sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_LPC)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_LPC)); =20 /* * On the AST2400 and AST2500 the one LPC IRQ is shared between all of= the @@ -514,7 +515,7 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->hace), 0, sc->memmap[ASPEED_DEV_HACE]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_HACE)); + aspeed_soc_ast2400_get_irq(s, ASPEED_DEV_HACE)); } =20 static void aspeed_soc_ast2400_class_init(ObjectClass *oc, const void *dat= a) @@ -542,7 +543,6 @@ static void aspeed_soc_ast2400_class_init(ObjectClass *= oc, const void *data) sc->irqmap =3D aspeed_soc_ast2400_irqmap; sc->memmap =3D aspeed_soc_ast2400_memmap; sc->num_cpus =3D 1; - sc->get_irq =3D aspeed_soc_ast2400_get_irq; } =20 static void aspeed_soc_ast2500_class_init(ObjectClass *oc, const void *dat= a) @@ -570,7 +570,6 @@ static void aspeed_soc_ast2500_class_init(ObjectClass *= oc, const void *data) sc->irqmap =3D aspeed_soc_ast2500_irqmap; sc->memmap =3D aspeed_soc_ast2500_memmap; sc->num_cpus =3D 1; - sc->get_irq =3D aspeed_soc_ast2400_get_irq; } =20 static const TypeInfo aspeed_soc_ast2400_types[] =3D { diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index f508bf53e7..498d1ecc07 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -464,7 +464,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_RTC)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_RTC)); =20 /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu), @@ -475,7 +475,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->timerctrl), 0, sc->memmap[ASPEED_DEV_TIMER1]); for (i =3D 0; i < ASPEED_TIMER_NR_TIMERS; i++) { - irq =3D aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i); + irq =3D aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_TIMER1 + i); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); } =20 @@ -486,7 +486,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_ADC)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_ADC)); =20 /* UART */ for (i =3D 0, uart =3D sc->uarts_base; i < sc->uarts_num; i++, uart++)= { @@ -495,7 +495,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) return; } sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, - aspeed_soc_get_irq(s, uart)); + aspeed_soc_ast2600_get_irq(s, uart)); } =20 /* I2C */ @@ -520,7 +520,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->peci), 0, sc->memmap[ASPEED_DEV_PECI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_PECI)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_PECI)); =20 /* PCIe Root Complex (RC) */ if (!aspeed_soc_ast2600_pcie_realize(dev, errp)) { @@ -538,7 +538,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 1, ASPEED_SMC_GET_CLASS(&s->fmc)->flash_window_base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_FMC)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_FMC)); =20 /* Set up an alias on the FMC CE0 region (boot default) */ MemoryRegion *fmc0_mmio =3D &s->fmc.flashes[0].mmio; @@ -567,7 +567,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ehci[i]), 0, sc->memmap[ASPEED_DEV_EHCI1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i)); + aspeed_soc_ast2600_get_irq(s, + ASPEED_DEV_EHCI1 + i= )); } =20 /* SDMC - SDRAM Memory Controller */ @@ -605,7 +606,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, sc->memmap[ASPEED_DEV_ETH1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_ETH1 += i)); =20 object_property_set_link(OBJECT(&s->mii[i]), "nic", OBJECT(&s->ftgmac100[i]), &error_abort); @@ -624,7 +625,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->xdma), 0, sc->memmap[ASPEED_DEV_XDMA]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_XDMA)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_XDMA)); =20 /* GPIO */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { @@ -633,7 +634,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_DEV_GPIO]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_GPIO)); =20 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio_1_8v), errp)) { return; @@ -641,7 +642,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio_1_8v), 0, sc->memmap[ASPEED_DEV_GPIO_1_8V]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio_1_8v), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_GPIO_1_8V)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_GPIO_1_8V)= ); =20 /* SDHCI */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { @@ -650,7 +651,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sdhci), 0, sc->memmap[ASPEED_DEV_SDHCI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_SDHCI)); =20 /* eMMC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->emmc), errp)) { @@ -659,7 +660,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->emmc), 0, sc->memmap[ASPEED_DEV_EMMC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_EMMC)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_EMMC)); =20 /* LPC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->lpc), errp)) { @@ -670,7 +671,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) =20 /* Connect the LPC IRQ to the GIC. It is otherwise unused. */ sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_LPC)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_LPC)); =20 /* * On the AST2600 LPC subdevice IRQs are connected straight to the GIC. @@ -705,7 +706,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->hace), 0, sc->memmap[ASPEED_DEV_HACE]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_HACE)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_HACE)); =20 /* I3C */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) { @@ -735,7 +736,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fsi[i]), 0, sc->memmap[ASPEED_DEV_FSI1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->fsi[i]), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_FSI1 + i)); + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_FSI1 += i)); } } =20 @@ -771,7 +772,6 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *= oc, const void *data) sc->irqmap =3D aspeed_soc_ast2600_irqmap; sc->memmap =3D aspeed_soc_ast2600_memmap; sc->num_cpus =3D 2; - sc->get_irq =3D aspeed_soc_ast2600_get_irq; sc->boot_from_emmc =3D aspeed_soc_ast2600_boot_from_emmc; } =20 diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c index 7420ae04ac..f90d144372 100644 --- a/hw/arm/aspeed_ast27x0-ssp.c +++ b/hw/arm/aspeed_ast27x0-ssp.c @@ -244,7 +244,7 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *= dev_soc, Error **errp) return; } sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, - aspeed_soc_get_irq(s, uart)); + aspeed_soc_ast27x0ssp_get_irq(s, uart)); } =20 aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->timerctrl), @@ -286,7 +286,6 @@ static void aspeed_soc_ast27x0ssp_class_init(ObjectClas= s *klass, const void *dat sc->irqmap =3D aspeed_soc_ast27x0ssp_irqmap; sc->memmap =3D aspeed_soc_ast27x0ssp_memmap; sc->num_cpus =3D 1; - sc->get_irq =3D aspeed_soc_ast27x0ssp_get_irq; } =20 static const TypeInfo aspeed_soc_ast27x0ssp_types[] =3D { diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c index b764147a33..8643f82683 100644 --- a/hw/arm/aspeed_ast27x0-tsp.c +++ b/hw/arm/aspeed_ast27x0-tsp.c @@ -244,7 +244,7 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *= dev_soc, Error **errp) return; } sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, - aspeed_soc_get_irq(s, uart)); + aspeed_soc_ast27x0tsp_get_irq(s, uart)); } =20 aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->timerctrl), @@ -286,7 +286,6 @@ static void aspeed_soc_ast27x0tsp_class_init(ObjectClas= s *klass, const void *dat sc->irqmap =3D aspeed_soc_ast27x0tsp_irqmap; sc->memmap =3D aspeed_soc_ast27x0tsp_memmap; sc->num_cpus =3D 1; - sc->get_irq =3D aspeed_soc_ast27x0tsp_get_irq; } =20 static const TypeInfo aspeed_soc_ast27x0tsp_types[] =3D { diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index 96882b8755..c484bcd4e2 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -660,7 +660,7 @@ static bool aspeed_soc_ast2700_pcie_realize(DeviceState= *dev, Error **errp) } aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->pcie[i]), 0, sc->memmap[ASPEED_DEV_PCIE0 + i]); - irq =3D aspeed_soc_get_irq(s, ASPEED_DEV_PCIE0 + i); + irq =3D aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_PCIE0 + i); sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie[i].rc), 0, irq); =20 mmio_mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->pcie[i].rc),= 1); @@ -795,7 +795,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) return; } sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, - aspeed_soc_get_irq(s, uart)); + aspeed_soc_ast2700_get_irq(s, uart)); } =20 /* FMC, The number of CS is set at the board level */ @@ -812,7 +812,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 1, ASPEED_SMC_GET_CLASS(&s->fmc)->flash_window_base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_FMC)); + aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_FMC)); =20 /* Set up an alias on the FMC CE0 region (boot default) */ MemoryRegion *fmc0_mmio =3D &s->fmc.flashes[0].mmio; @@ -841,7 +841,8 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ehci[i]), 0, sc->memmap[ASPEED_DEV_EHCI1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i)); + aspeed_soc_ast2700_get_irq(s, + ASPEED_DEV_EHCI1 + i= )); } =20 /* @@ -876,7 +877,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, sc->memmap[ASPEED_DEV_ETH1 + i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i)); + aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_ETH1 += i)); =20 object_property_set_link(OBJECT(&s->mii[i]), "nic", OBJECT(&s->ftgmac100[i]), &error_abort); @@ -921,7 +922,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_ADC)); + aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_ADC)); =20 /* I2C */ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), @@ -962,7 +963,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_DEV_GPIO]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); + aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_GPIO)); =20 /* RTC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) { @@ -971,7 +972,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_RTC)); + aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_RTC)); =20 /* SDHCI */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { @@ -980,7 +981,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sdhci), 0, sc->memmap[ASPEED_DEV_SDHCI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI)); + aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_SDHCI)); =20 /* eMMC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->emmc), errp)) { @@ -989,7 +990,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev= , Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->emmc), 0, sc->memmap[ASPEED_DEV_EMMC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_EMMC)); + aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_EMMC)); =20 /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu), @@ -1000,7 +1001,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *d= ev, Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->timerctrl), 0, sc->memmap[ASPEED_DEV_TIMER1]); for (i =3D 0; i < ASPEED_TIMER_NR_TIMERS; i++) { - irq =3D aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i); + irq =3D aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_TIMER1 + i); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); } =20 @@ -1013,7 +1014,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *d= ev, Error **errp) aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->hace), 0, sc->memmap[ASPEED_DEV_HACE]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0, - aspeed_soc_get_irq(s, ASPEED_DEV_HACE)); + aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_HACE)); =20 /* PCIe Root Complex (RC) */ if (!aspeed_soc_ast2700_pcie_realize(dev, errp)) { @@ -1068,7 +1069,6 @@ static void aspeed_soc_ast2700a0_class_init(ObjectCla= ss *oc, const void *data) sc->uarts_base =3D ASPEED_DEV_UART0; sc->irqmap =3D aspeed_soc_ast2700a0_irqmap; sc->memmap =3D aspeed_soc_ast2700_memmap; - sc->get_irq =3D aspeed_soc_ast2700_get_irq; } =20 static void aspeed_soc_ast2700a1_class_init(ObjectClass *oc, const void *d= ata) @@ -1097,7 +1097,6 @@ static void aspeed_soc_ast2700a1_class_init(ObjectCla= ss *oc, const void *data) sc->uarts_base =3D ASPEED_DEV_UART0; sc->irqmap =3D aspeed_soc_ast2700a1_irqmap; sc->memmap =3D aspeed_soc_ast2700_memmap; - sc->get_irq =3D aspeed_soc_ast2700_get_irq; } =20 static const TypeInfo aspeed_soc_ast27x0_types[] =3D { diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c index a785a50609..78b6ae18f8 100644 --- a/hw/arm/aspeed_soc_common.c +++ b/hw/arm/aspeed_soc_common.c @@ -30,11 +30,6 @@ const char *aspeed_soc_cpu_type(const char * const *vali= d_cpu_types) return valid_cpu_types[0]; } =20 -qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev) -{ - return ASPEED_SOC_GET_CLASS(s)->get_irq(s, dev); -} - bool aspeed_soc_uart_realize(MemoryRegion *memory, SerialMM *smm, const hwaddr addr, Error **errp) { --=20 2.43.0