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Set it once in the callees. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/translate.c | 1 + target/riscv/insn_trans/trans_rvzabha.c.inc | 2 +- target/riscv/insn_trans/trans_rvzacas.c.inc | 7 ++++--- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 94af9853cfe..2e6f39aa02d 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1156,6 +1156,7 @@ static bool gen_cmpxchg(DisasContext *ctx, arg_atomic= *a, MemOp mop) TCGv src1 =3D get_address(ctx, a->rs1, 0); TCGv src2 =3D get_gpr(ctx, a->rs2, EXT_NONE); =20 + mop |=3D MO_TE; decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); tcg_gen_atomic_cmpxchg_tl(dest, src1, dest, src2, ctx->mem_idx, mop); =20 diff --git a/target/riscv/insn_trans/trans_rvzabha.c.inc b/target/riscv/ins= n_trans/trans_rvzabha.c.inc index c1f99b65f09..302c63f2a3d 100644 --- a/target/riscv/insn_trans/trans_rvzabha.c.inc +++ b/target/riscv/insn_trans/trans_rvzabha.c.inc @@ -141,5 +141,5 @@ static bool trans_amocas_h(DisasContext *ctx, arg_amoca= s_h *a) { REQUIRE_ZACAS(ctx); REQUIRE_ZABHA(ctx); - return gen_cmpxchg(ctx, a, MO_ALIGN | MO_TE | MO_SW); + return gen_cmpxchg(ctx, a, MO_ALIGN | MO_SW); } diff --git a/target/riscv/insn_trans/trans_rvzacas.c.inc b/target/riscv/ins= n_trans/trans_rvzacas.c.inc index 5e7c7c92b72..d850b142642 100644 --- a/target/riscv/insn_trans/trans_rvzacas.c.inc +++ b/target/riscv/insn_trans/trans_rvzacas.c.inc @@ -25,7 +25,7 @@ static bool trans_amocas_w(DisasContext *ctx, arg_amocas_w *a) { REQUIRE_ZACAS(ctx); - return gen_cmpxchg(ctx, a, MO_ALIGN | MO_TE | MO_SL); + return gen_cmpxchg(ctx, a, MO_ALIGN | MO_SL); } =20 static TCGv_i64 get_gpr_pair(DisasContext *ctx, int reg_num) @@ -76,6 +76,7 @@ static bool gen_cmpxchg64(DisasContext *ctx, arg_atomic *= a, MemOp mop) TCGv src1 =3D get_address(ctx, a->rs1, 0); TCGv_i64 src2 =3D get_gpr_pair(ctx, a->rs2); =20 + mop |=3D MO_TE; decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); tcg_gen_atomic_cmpxchg_i64(dest, src1, dest, src2, ctx->mem_idx, mop); =20 @@ -88,10 +89,10 @@ static bool trans_amocas_d(DisasContext *ctx, arg_amoca= s_d *a) REQUIRE_ZACAS(ctx); switch (get_ol(ctx)) { case MXL_RV32: - return gen_cmpxchg64(ctx, a, MO_ALIGN | MO_TE | MO_UQ); + return gen_cmpxchg64(ctx, a, MO_ALIGN | MO_UQ); case MXL_RV64: case MXL_RV128: - return gen_cmpxchg(ctx, a, MO_ALIGN | MO_TE | MO_UQ); + return gen_cmpxchg(ctx, a, MO_ALIGN | MO_UQ); default: g_assert_not_reached(); } --=20 2.51.0