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Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-id: 20251008215613.300150-44-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/tcg/translate.h | 20 +++++++++++++ target/arm/tcg/translate-a64.c | 2 ++ target/arm/tcg/translate.c | 53 ++++++++++++++++++++++++++++++++++ 3 files changed, 75 insertions(+) diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h index 943dfd45fe7..9a85ea74dbb 100644 --- a/target/arm/tcg/translate.h +++ b/target/arm/tcg/translate.h @@ -21,9 +21,25 @@ typedef struct DisasLabel { target_ulong pc_save; } DisasLabel; =20 +/* + * Emit an exception call out of line. + */ +typedef struct DisasDelayException { + struct DisasDelayException *next; + TCGLabel *lab; + target_long pc_curr; + target_long pc_save; + int condexec_mask; + int condexec_cond; + uint32_t excp; + uint32_t syn; + uint32_t target_el; +} DisasDelayException; + typedef struct DisasContext { DisasContextBase base; const ARMISARegisters *isar; + DisasDelayException *delay_excp_list; =20 /* The address of the current instruction being translated. */ target_ulong pc_curr; @@ -365,6 +381,10 @@ void gen_exception_insn_el(DisasContext *s, target_lon= g pc_diff, int excp, uint32_t syn, uint32_t target_el); void gen_exception_insn(DisasContext *s, target_long pc_diff, int excp, uint32_t syn); +TCGLabel *delay_exception_el(DisasContext *s, int excp, + uint32_t syn, uint32_t target_el); +TCGLabel *delay_exception(DisasContext *s, int excp, uint32_t syn); +void emit_delayed_exceptions(DisasContext *s); =20 /* Return state of Alternate Half-precision flag, caller frees result */ static inline TCGv_i32 get_ahp_flag(void) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 1337e16a96b..c037119cdf9 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -10601,6 +10601,8 @@ static void aarch64_tr_tb_stop(DisasContextBase *dc= base, CPUState *cpu) break; } } + + emit_delayed_exceptions(dc); } =20 const TranslatorOps aarch64_translator_ops =3D { diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index e62dcc5d85d..78d26aac043 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -1088,6 +1088,57 @@ void gen_exception_insn(DisasContext *s, target_long= pc_diff, s->base.is_jmp =3D DISAS_NORETURN; } =20 +TCGLabel *delay_exception_el(DisasContext *s, int excp, + uint32_t syn, uint32_t target_el) +{ + /* Use tcg_malloc for automatic release on longjmp out of translation.= */ + DisasDelayException *e =3D tcg_malloc(sizeof(DisasDelayException)); + + memset(e, 0, sizeof(*e)); + + /* Save enough of the current state to satisfy gen_exception_insn. */ + e->pc_curr =3D s->pc_curr; + e->pc_save =3D s->pc_save; + if (!s->aarch64) { + e->condexec_cond =3D s->condexec_cond; + e->condexec_mask =3D s->condexec_mask; + } + + e->excp =3D excp; + e->syn =3D syn; + e->target_el =3D target_el; + + e->next =3D s->delay_excp_list; + s->delay_excp_list =3D e; + + e->lab =3D gen_new_label(); + return e->lab; +} + +TCGLabel *delay_exception(DisasContext *s, int excp, uint32_t syn) +{ + return delay_exception_el(s, excp, syn, 0); +} + +void emit_delayed_exceptions(DisasContext *s) +{ + for (DisasDelayException *e =3D s->delay_excp_list; e ; e =3D e->next)= { + gen_set_label(e->lab); + + /* Restore the insn state to satisfy gen_exception_insn. */ + s->pc_curr =3D e->pc_curr; + s->pc_save =3D e->pc_save; + s->condexec_cond =3D e->condexec_cond; + s->condexec_mask =3D e->condexec_mask; + + if (e->target_el) { + gen_exception_insn_el(s, 0, e->excp, e->syn, e->target_el); + } else { + gen_exception_insn(s, 0, e->excp, e->syn); + } + } +} + static void gen_exception_bkpt_insn(DisasContext *s, uint32_t syn) { gen_set_condexec(s); @@ -6791,6 +6842,8 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, = CPUState *cpu) gen_goto_tb(dc, 1, curr_insn_len(dc)); } } + + emit_delayed_exceptions(dc); } =20 static const TranslatorOps arm_translator_ops =3D { --=20 2.43.0