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It has no ID enable, being back-allocated into the hint nop space. Reviewed-by: Gustavo Romero Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-id: 20251008215613.300150-34-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- docs/system/arm/emulation.rst | 1 + target/arm/tcg/a64.decode | 1 + target/arm/tcg/translate-a64.c | 14 ++++++++++++++ 3 files changed, 16 insertions(+) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index c779a50570a..68d9a4e7342 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -28,6 +28,7 @@ the following architecture extensions: - FEAT_BF16 (AArch64 BFloat16 instructions) - FEAT_BTI (Branch Target Identification) - FEAT_CCIDX (Extended cache index) +- FEAT_CHK (Check Feature Status) - FEAT_CMOW (Control for cache maintenance permission) - FEAT_CRC32 (CRC32 instructions) - FEAT_Crypto (Cryptographic Extension) diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode index 55ff6c504f1..8283a9c83d9 100644 --- a/target/arm/tcg/a64.decode +++ b/target/arm/tcg/a64.decode @@ -256,6 +256,7 @@ ERETA 1101011 0100 11111 00001 m:1 11111 1111= 1 &reta # ERETAA, ERETAB AUTIASP 1101 0101 0000 0011 0010 0011 101 11111 AUTIBZ 1101 0101 0000 0011 0010 0011 110 11111 AUTIBSP 1101 0101 0000 0011 0010 0011 111 11111 + CHKFEAT 1101 0101 0000 0011 0010 0101 000 11111 ] # The canonical NOP has CRm =3D=3D op2 =3D=3D 0, but all of the space # that isn't specifically allocated to an instruction must NOP diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 693eab1c012..78b2881a155 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -2124,6 +2124,20 @@ static bool trans_AUTIBSP(DisasContext *s, arg_AUTIB= SP *a) return true; } =20 +static bool trans_CHKFEAT(DisasContext *s, arg_CHKFEAT *a) +{ + uint64_t feat_en =3D 0; + + if (s->gcs_en) { + feat_en |=3D 1 << 0; + } + if (feat_en) { + TCGv_i64 x16 =3D cpu_reg(s, 16); + tcg_gen_andi_i64(x16, x16, ~feat_en); + } + return true; +} + static bool trans_CLREX(DisasContext *s, arg_CLREX *a) { tcg_gen_movi_i64(cpu_exclusive_addr, -1); --=20 2.43.0