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a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1760084528; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=kN1hftEnvVvBVOyTPgXuryjh2sa8FXlMQCoo5OJbylY=; b=gZAekeU90zZono5gNioezBDEFbqjDuq1UZ/gDUMCZAfpjLoGCe7zOm61QfnePYtVSkkv/U L4TkoQudzFtrQfs9JQ/g+8Q+ySbSe1ROzo+RGxaOgB0TcqHxJDqbr/xJoOYvC+P/OPUSGT 6ZZAV4zctVNTRXPqtQaqlpef7226lkY= X-MC-Unique: _H1qvcEqN36b20i0GAhZ9A-1 X-Mimecast-MFC-AGG-ID: _H1qvcEqN36b20i0GAhZ9A_1760084525 From: Thomas Huth To: qemu-devel@nongnu.org Cc: Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 8/9] target/s390x: Replace legacy cpu_physical_memory_[un]map() calls (3/3) Date: Fri, 10 Oct 2025 10:21:43 +0200 Message-ID: <20251010082145.576222-9-thuth@redhat.com> In-Reply-To: <20251010082145.576222-1-thuth@redhat.com> References: <20251010082145.576222-1-thuth@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.438, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1760084636645154100 From: Philippe Mathieu-Daud=C3=A9 Commit b7ecba0f6f6 ("docs/devel/loads-stores.rst: Document our various load and store APIs") mentioned cpu_physical_memory_*() methods are legacy, the replacement being address_space_*(). Replace the *_map() / *_unmap() methods in s390_store_status() and s390_store_adtl_status(). In s390_store_status(), replace cpu_physical_memory_write() by address_space_stb(), restricting @ar_id scope. No behavioral change expected. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20251002091132.65703-10-philmd@linaro.org> Signed-off-by: Thomas Huth --- target/s390x/sigp.c | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c index 2487acdb49e..f5d7bc0fa22 100644 --- a/target/s390x/sigp.c +++ b/target/s390x/sigp.c @@ -13,6 +13,7 @@ #include "s390x-internal.h" #include "hw/boards.h" #include "system/hw_accel.h" +#include "system/memory.h" #include "system/runstate.h" #include "system/address-spaces.h" #include "exec/cputlb.h" @@ -147,7 +148,8 @@ QEMU_BUILD_BUG_ON(sizeof(SigpSaveArea) !=3D 512); #define S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) static int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) { - static const uint8_t ar_id =3D 1; + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; + AddressSpace *as =3D CPU(cpu)->as; SigpSaveArea *sa; hwaddr len =3D sizeof(*sa); int i; @@ -157,17 +159,21 @@ static int s390_store_status(S390CPU *cpu, hwaddr add= r, bool store_arch) return 0; } =20 - sa =3D cpu_physical_memory_map(addr, &len, true); + sa =3D address_space_map(as, addr, &len, true, attrs); if (!sa) { return -EFAULT; } if (len !=3D sizeof(*sa)) { - cpu_physical_memory_unmap(sa, len, 1, 0); + address_space_unmap(as, sa, len, true, 0); return -EFAULT; } =20 if (store_arch) { - cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id,= 1); + static const uint8_t ar_id =3D 1; + + address_space_stb(as, offsetof(LowCore, ar_access_id), + ar_id, attrs, NULL); + } for (i =3D 0; i < 16; ++i) { sa->fprs[i] =3D cpu_to_be64(*get_freg(&cpu->env, i)); @@ -189,7 +195,7 @@ static int s390_store_status(S390CPU *cpu, hwaddr addr,= bool store_arch) sa->crs[i] =3D cpu_to_be64(cpu->env.cregs[i]); } =20 - cpu_physical_memory_unmap(sa, len, 1, len); + address_space_unmap(as, sa, len, true, len); =20 return 0; } @@ -251,16 +257,18 @@ QEMU_BUILD_BUG_ON(sizeof(SigpAdtlSaveArea) !=3D 4096); #define ADTL_GS_MIN_SIZE 2048 /* minimal size of adtl save area for GS */ static int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len) { + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; + AddressSpace *as =3D CPU(cpu)->as; SigpAdtlSaveArea *sa; hwaddr save =3D len; int i; =20 - sa =3D cpu_physical_memory_map(addr, &save, true); + sa =3D address_space_map(as, addr, &save, true, attrs); if (!sa) { return -EFAULT; } if (save !=3D len) { - cpu_physical_memory_unmap(sa, len, 1, 0); + address_space_unmap(as, sa, len, true, 0); return -EFAULT; } =20 @@ -276,7 +284,8 @@ static int s390_store_adtl_status(S390CPU *cpu, hwaddr = addr, hwaddr len) } } =20 - cpu_physical_memory_unmap(sa, len, 1, len); + address_space_unmap(as, sa, len, true, len); + return 0; } =20 --=20 2.51.0