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Thu, 09 Oct 2025 00:51:03 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG/09Lu9aEGppm7HeredNwct2rqsEPCktxM0aQDFNI66hpR08C76DkfP/ogl+xXjG0GTWyUXg== X-Received: by 2002:a05:6000:2386:b0:425:6fb5:2ad4 with SMTP id ffacd0b85a97d-425829e78f4mr6787968f8f.15.1759996262435; Thu, 09 Oct 2025 00:51:02 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Magnus Kulke Subject: [PULL 16/35] accel/mshv: Add vCPU creation and execution loop Date: Thu, 9 Oct 2025 09:50:06 +0200 Message-ID: <20251009075026.505715-17-pbonzini@redhat.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251009075026.505715-1-pbonzini@redhat.com> References: <20251009075026.505715-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.442, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, T_SPF_HELO_TEMPERROR=0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1759996419669116600 Content-Type: text/plain; charset="utf-8" From: Magnus Kulke Create MSHV vCPUs using MSHV_CREATE_VP and initialize their state. Register the MSHV CPU execution loop loop with the QEMU accelerator framework to enable guest code execution. The target/i386 functionality is still mostly stubbed out and will be populated in a later commit in this series. Signed-off-by: Magnus Kulke Link: https://lore.kernel.org/r/20250916164847.77883-11-magnuskulke@linux.m= icrosoft.com [Fix g_free/g_clear_pointer confusion; rename qemu_wait_io_event; mshv.h/mshv_int.h split. - Paolo] Signed-off-by: Paolo Bonzini --- include/system/mshv.h | 2 +- include/system/mshv_int.h | 20 ++++ accel/mshv/mshv-all.c | 186 +++++++++++++++++++++++++++++++++--- target/i386/mshv/mshv-cpu.c | 63 ++++++++++++ accel/mshv/trace-events | 2 + 5 files changed, 260 insertions(+), 13 deletions(-) diff --git a/include/system/mshv.h b/include/system/mshv.h index 1011e81df47..bbc42f4dc3a 100644 --- a/include/system/mshv.h +++ b/include/system/mshv.h @@ -41,7 +41,7 @@ extern bool mshv_allowed; #define mshv_msi_via_irqfd_enabled() mshv_enabled() #else /* CONFIG_MSHV_IS_POSSIBLE */ #define mshv_enabled() false -#define mshv_msi_via_irqfd_enabled() false +#define mshv_msi_via_irqfd_enabled() mshv_enabled() #endif =20 typedef struct MshvState MshvState; diff --git a/include/system/mshv_int.h b/include/system/mshv_int.h index b36124a0ea7..fb80f69772b 100644 --- a/include/system/mshv_int.h +++ b/include/system/mshv_int.h @@ -14,6 +14,8 @@ #ifndef QEMU_MSHV_INT_H #define QEMU_MSHV_INT_H =20 +typedef struct hyperv_message hv_message; + struct AccelCPUState { int cpufd; bool dirty; @@ -44,6 +46,24 @@ typedef struct MshvMsiControl { GHashTable *gsi_routes; } MshvMsiControl; =20 +#define mshv_vcpufd(cpu) (cpu->accel->cpufd) + +/* cpu */ +typedef enum MshvVmExit { + MshvVmExitIgnore =3D 0, + MshvVmExitShutdown =3D 1, + MshvVmExitSpecial =3D 2, +} MshvVmExit; + +void mshv_init_mmio_emu(void); +int mshv_create_vcpu(int vm_fd, uint8_t vp_index, int *cpu_fd); +void mshv_remove_vcpu(int vm_fd, int cpu_fd); +int mshv_run_vcpu(int vm_fd, CPUState *cpu, hv_message *msg, MshvVmExit *e= xit); +int mshv_load_regs(CPUState *cpu); +int mshv_store_regs(CPUState *cpu); +int mshv_arch_put_registers(const CPUState *cpu); +void mshv_arch_init_vcpu(CPUState *cpu); +void mshv_arch_destroy_vcpu(CPUState *cpu); void mshv_arch_amend_proc_features( union hv_partition_synthetic_processor_features *features); int mshv_arch_post_init_vm(int vm_fd); diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c index 653195c57c9..e02421d79d4 100644 --- a/accel/mshv/mshv-all.c +++ b/accel/mshv/mshv-all.c @@ -393,6 +393,24 @@ int mshv_hvcall(int fd, const struct mshv_root_hvcall = *args) return ret; } =20 +static int mshv_init_vcpu(CPUState *cpu) +{ + int vm_fd =3D mshv_state->vm; + uint8_t vp_index =3D cpu->cpu_index; + int ret; + + mshv_arch_init_vcpu(cpu); + cpu->accel =3D g_new0(AccelCPUState, 1); + + ret =3D mshv_create_vcpu(vm_fd, vp_index, &cpu->accel->cpufd); + if (ret < 0) { + return -1; + } + + cpu->accel->dirty =3D true; + + return 0; +} =20 static int mshv_init(AccelState *as, MachineState *ms) { @@ -415,6 +433,8 @@ static int mshv_init(AccelState *as, MachineState *ms) return -1; } =20 + mshv_init_mmio_emu(); + mshv_init_msicontrol(); =20 ret =3D create_vm(mshv_fd, &vm_fd); @@ -444,40 +464,182 @@ static int mshv_init(AccelState *as, MachineState *m= s) return 0; } =20 +static int mshv_destroy_vcpu(CPUState *cpu) +{ + int cpu_fd =3D mshv_vcpufd(cpu); + int vm_fd =3D mshv_state->vm; + + mshv_remove_vcpu(vm_fd, cpu_fd); + mshv_vcpufd(cpu) =3D 0; + + mshv_arch_destroy_vcpu(cpu); + g_clear_pointer(&cpu->accel, g_free); + return 0; +} + +static int mshv_cpu_exec(CPUState *cpu) +{ + hv_message mshv_msg; + enum MshvVmExit exit_reason; + int ret =3D 0; + + bql_unlock(); + cpu_exec_start(cpu); + + do { + if (cpu->accel->dirty) { + ret =3D mshv_arch_put_registers(cpu); + if (ret) { + error_report("Failed to put registers after init: %s", + strerror(-ret)); + ret =3D -1; + break; + } + cpu->accel->dirty =3D false; + } + + ret =3D mshv_run_vcpu(mshv_state->vm, cpu, &mshv_msg, &exit_reason= ); + if (ret < 0) { + error_report("Failed to run on vcpu %d", cpu->cpu_index); + abort(); + } + + switch (exit_reason) { + case MshvVmExitIgnore: + break; + default: + ret =3D EXCP_INTERRUPT; + break; + } + } while (ret =3D=3D 0); + + cpu_exec_end(cpu); + bql_lock(); + + if (ret < 0) { + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); + vm_stop(RUN_STATE_INTERNAL_ERROR); + } + + return ret; +} + +static void *mshv_vcpu_thread(void *arg) +{ + CPUState *cpu =3D arg; + int ret; + + rcu_register_thread(); + + bql_lock(); + qemu_thread_get_self(cpu->thread); + cpu->thread_id =3D qemu_get_thread_id(); + current_cpu =3D cpu; + ret =3D mshv_init_vcpu(cpu); + if (ret < 0) { + error_report("Failed to init vcpu %d", cpu->cpu_index); + goto cleanup; + } + + /* signal CPU creation */ + cpu_thread_signal_created(cpu); + qemu_guest_random_seed_thread_part2(cpu->random_seed); + + do { + qemu_process_cpu_events(cpu); + if (cpu_can_run(cpu)) { + mshv_cpu_exec(cpu); + } + } while (!cpu->unplug || cpu_can_run(cpu)); + + mshv_destroy_vcpu(cpu); +cleanup: + cpu_thread_signal_destroyed(cpu); + bql_unlock(); + rcu_unregister_thread(); + return NULL; +} + static void mshv_start_vcpu_thread(CPUState *cpu) { - error_report("unimplemented"); - abort(); + char thread_name[VCPU_THREAD_NAME_SIZE]; + + cpu->thread =3D g_malloc0(sizeof(QemuThread)); + cpu->halt_cond =3D g_malloc0(sizeof(QemuCond)); + + qemu_cond_init(cpu->halt_cond); + + trace_mshv_start_vcpu_thread(thread_name, cpu->cpu_index); + qemu_thread_create(cpu->thread, thread_name, mshv_vcpu_thread, cpu, + QEMU_THREAD_JOINABLE); +} + +static void do_mshv_cpu_synchronize_post_init(CPUState *cpu, + run_on_cpu_data arg) +{ + int ret =3D mshv_arch_put_registers(cpu); + if (ret < 0) { + error_report("Failed to put registers after init: %s", strerror(-r= et)); + abort(); + } + + cpu->accel->dirty =3D false; } =20 static void mshv_cpu_synchronize_post_init(CPUState *cpu) { - error_report("unimplemented"); - abort(); + run_on_cpu(cpu, do_mshv_cpu_synchronize_post_init, RUN_ON_CPU_NULL); } =20 static void mshv_cpu_synchronize_post_reset(CPUState *cpu) { - error_report("unimplemented"); - abort(); + int ret =3D mshv_arch_put_registers(cpu); + if (ret) { + error_report("Failed to put registers after reset: %s", + strerror(-ret)); + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); + vm_stop(RUN_STATE_INTERNAL_ERROR); + } + cpu->accel->dirty =3D false; +} + +static void do_mshv_cpu_synchronize_pre_loadvm(CPUState *cpu, + run_on_cpu_data arg) +{ + cpu->accel->dirty =3D true; } =20 static void mshv_cpu_synchronize_pre_loadvm(CPUState *cpu) { - error_report("unimplemented"); - abort(); + run_on_cpu(cpu, do_mshv_cpu_synchronize_pre_loadvm, RUN_ON_CPU_NULL); +} + +static void do_mshv_cpu_synchronize(CPUState *cpu, run_on_cpu_data arg) +{ + if (!cpu->accel->dirty) { + int ret =3D mshv_load_regs(cpu); + if (ret < 0) { + error_report("Failed to load registers for vcpu %d", + cpu->cpu_index); + + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); + vm_stop(RUN_STATE_INTERNAL_ERROR); + } + + cpu->accel->dirty =3D true; + } } =20 static void mshv_cpu_synchronize(CPUState *cpu) { - error_report("unimplemented"); - abort(); + if (!cpu->accel->dirty) { + run_on_cpu(cpu, do_mshv_cpu_synchronize, RUN_ON_CPU_NULL); + } } =20 static bool mshv_cpus_are_resettable(void) { - error_report("unimplemented"); - abort(); + return false; } =20 static void mshv_accel_class_init(ObjectClass *oc, const void *data) diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c index de0c26bc6c6..02d71ebc14a 100644 --- a/target/i386/mshv/mshv-cpu.c +++ b/target/i386/mshv/mshv-cpu.c @@ -22,15 +22,78 @@ #include "hw/hyperv/hvgdk_mini.h" #include "hw/hyperv/hvhdk_mini.h" =20 +#include "cpu.h" +#include "emulate/x86_decode.h" +#include "emulate/x86_emu.h" +#include "emulate/x86_flags.h" + #include "trace-accel_mshv.h" #include "trace.h" =20 +int mshv_store_regs(CPUState *cpu) +{ + error_report("unimplemented"); + abort(); +} + +int mshv_load_regs(CPUState *cpu) +{ + error_report("unimplemented"); + abort(); +} + +int mshv_arch_put_registers(const CPUState *cpu) +{ + error_report("unimplemented"); + abort(); +} + void mshv_arch_amend_proc_features( union hv_partition_synthetic_processor_features *features) { features->access_guest_idle_reg =3D 1; } =20 +int mshv_run_vcpu(int vm_fd, CPUState *cpu, hv_message *msg, MshvVmExit *e= xit) +{ + error_report("unimplemented"); + abort(); +} + +void mshv_remove_vcpu(int vm_fd, int cpu_fd) +{ + error_report("unimplemented"); + abort(); +} + +int mshv_create_vcpu(int vm_fd, uint8_t vp_index, int *cpu_fd) +{ + error_report("unimplemented"); + abort(); +} + +void mshv_init_mmio_emu(void) +{ + error_report("unimplemented"); + abort(); +} + +void mshv_arch_init_vcpu(CPUState *cpu) +{ + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + + env->emu_mmio_buf =3D g_new(char, 4096); +} + +void mshv_arch_destroy_vcpu(CPUState *cpu) +{ + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + + g_clear_pointer(&env->emu_mmio_buf, g_free); +} + /* * Default Microsoft Hypervisor behavior for unimplemented MSR is to send a * fault to the guest if it tries to access it. It is possible to override diff --git a/accel/mshv/trace-events b/accel/mshv/trace-events index 6130c4abf8a..a4dffeb24a3 100644 --- a/accel/mshv/trace-events +++ b/accel/mshv/trace-events @@ -3,6 +3,8 @@ # # SPDX-License-Identifier: GPL-2.0-or-later =20 +mshv_start_vcpu_thread(const char* thread, uint32_t cpu) "thread=3D%s cpu_= index=3D%d" + mshv_set_memory(bool add, uint64_t gpa, uint64_t size, uint64_t user_addr,= bool readonly, int ret) "add=3D%d gpa=3D0x%" PRIx64 " size=3D0x%" PRIx64 "= user=3D0x%" PRIx64 " readonly=3D%d result=3D%d" mshv_mem_ioeventfd_add(uint64_t addr, uint32_t size, uint32_t data) "addr= =3D0x%" PRIx64 " size=3D%d data=3D0x%x" mshv_mem_ioeventfd_del(uint64_t addr, uint32_t size, uint32_t data) "addr= =3D0x%" PRIx64 " size=3D%d data=3D0x%x" --=20 2.51.0