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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fa9d7f91esm18486965e9.20.2025.10.07.21.07.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 07 Oct 2025 21:07:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1759896443; x=1760501243; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FxAtWtmejX8FeMeLelhLJTDbTvi6ib8BE8g2ZB3OGV0=; b=viUDSEY0wtTcE7JQg/pmTRdcC7OWhtapT4MBQgDYEp1Ry8XlcF/X3lEFfcbDRMdOei 1Os+G8+6/1W5e1zqe12mtKOkJfcp5cCHM5SCrcI5Bnd+rpZhMMHKwYlF96snNeRpJ0eq mAkvUbC3vT0n5ljON9l7CM1uUIcXDFuCObgvhAehSeGMbW0XdtkLijPMHYb8skFZHfck xl4OHnmNjBu4TsrkWqIaoOmktR2daj3+oWc0R9yXdvvc5S4b57X/GaEbawRDcru1g71g g+GszYR2dqrlW8vi/yD2nYTvmzSeRqWIpNcDcO4hpkb6zrf8/wtxZ8JuTo6NSpqTsbK0 p/og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759896443; x=1760501243; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FxAtWtmejX8FeMeLelhLJTDbTvi6ib8BE8g2ZB3OGV0=; b=AOIG8d4Q0FxtNVaQ6S9qhbXXdmfoT14eHZ/951t6iXPW4/Y2V73ercTiblq85nYSOH LJntnn1FAETPGlgTzduoo1Hr+4YCsvLEjTpeoJ94BLxrpSKSHeAXxq/nCwbcVNOcpyPI +zvLAuk0Ab8G1CZ4ZxHiWbiFAT98fZxNpSjEPnPwyShnBZUTernllP08QgCgdXVFtG8t 11zprWqCZMfr16fGb1SjJyV6pWk7U6R5rMdt7xjxKoHba0wdTbc2AojktpmOPVrU12yW BauZgvyaUN7G+lxSW43WiGJO3lyYubIOSeZgEF/DEonBbzd5nOX7FoGRzXciRmR/zfVE cwcA== X-Gm-Message-State: AOJu0YzUDGKofEiXEc+GQhSTWo9MX1XKh81dNCxhTMDLs0R+6HG3g+al rWDkUKIgQpw7bR9l0pa8HMYdx14dMoBmZ6l5zLiyLJkDai2926gy3wyn4oeNciUWgXiyBOEbPqU 0Q0006KJ5PQ== X-Gm-Gg: ASbGncvFUMQYGUWPWffmO9K1KfxW+tvPctgTJKCIXMrZGzprghxAityu0+pzTtKU1qL HYPMBQQM3W4OBMYKaeVneNIGcNQSDiZ+VH3P9CDClwYZ1HVIJLsD8DTFUQ2x8DqYLzlxcuDDWk3 11udjEFIK0lkCelgNGu5iDd8aIR1Ib5+h9uYp/ZqBkH4xC73LUdm4Pv88REvWrPZSjEWKNNi9bj RL7HRsCj+bLAv4jRRHAsheWCeVgoK/9kTVia6pY4akIGULZo00U9deKrSPOJtlyU/OEbU1gHj5P nGLKhjIoXriWUX/iRUJh/syjRNnMHyX0pHyXuGlGKKN84dhdM9xPy4Iy9OJjPHmxGgK5i/vLl6u UZLlBON/s9OY7wIFKFgW0futrN7WfnE8EGxxv0xKspY5gr8FwoAouqt7qbPP6TbRrm/l2fyKmDr q1YH+qGRuLX7eB46Mys+RJKTqZ X-Google-Smtp-Source: AGHT+IExiobNOfGSPWTb7L2l3odsWU/Eo27joKAv0sBZvTrPNsL9nZk7Rb2MQW0Mia20pwxgoKA8RQ== X-Received: by 2002:a05:600c:3b1f:b0:46e:42cb:d93f with SMTP id 5b1f17b1804b1-46fa9a98ef7mr11946895e9.15.1759896442997; Tue, 07 Oct 2025 21:07:22 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, kvm@vger.kernel.org, Aleksandar Rikalo , Chinmay Rath , Matthew Rosato , Alistair Francis , Palmer Dabbelt , qemu-s390x@nongnu.org, David Hildenbrand , Marcelo Tosatti , Nicholas Piggin , Daniel Henrique Barboza , Liu Zhiwei , Jiaxun Yang , Harsh Prateek Bora , Paolo Bonzini , Ilya Leoshkevich , Richard Henderson , Thomas Huth , Christian Borntraeger , Halil Pasic , Aurelien Jarno , Song Gao , Weiwei Li , qemu-ppc@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Huacai Chen , Eric Farman Subject: [PATCH v2 1/3] accel/kvm: Do not expect more then KVM_PUT_FULL_STATE Date: Wed, 8 Oct 2025 06:07:12 +0200 Message-ID: <20251008040715.81513-2-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251008040715.81513-1-philmd@linaro.org> References: <20251008040715.81513-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1759896476842154100 KVM_PUT_FULL_STATE is the highest level defined so far in "system/kvm.h"; do not check for more. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Harsh Prateek Bora Reviewed-by: Andrew Jones --- target/loongarch/kvm/kvm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c index e5ea2dba9da..45292edcb1c 100644 --- a/target/loongarch/kvm/kvm.c +++ b/target/loongarch/kvm/kvm.c @@ -397,7 +397,7 @@ static int kvm_loongarch_put_csr(CPUState *cs, int leve= l) &env->CSR_RVACFG); =20 /* CPUID is constant after poweron, it should be set only once */ - if (level >=3D KVM_PUT_FULL_STATE) { + if (level =3D=3D KVM_PUT_FULL_STATE) { ret |=3D kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CPUID), &env->CSR_CPUID); } @@ -801,7 +801,7 @@ int kvm_arch_put_registers(CPUState *cs, int level, Err= or **errp) once =3D 1; } =20 - if (level >=3D KVM_PUT_FULL_STATE) { + if (level =3D=3D KVM_PUT_FULL_STATE) { /* * only KVM_PUT_FULL_STATE is required, kvm kernel will clear * guest_addr for KVM_PUT_RESET_STATE --=20 2.51.0 From nobody Fri Nov 14 22:18:41 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1759896474; cv=none; d=zohomail.com; s=zohoarc; b=QS4icb1ZL/OLtwUyj5a3DpmNcFRp4RBzDJSTtIb3j8zQM8YZTxIvkVHmUS4ZtCVdgd7h7sti9O1DOO/qwKQsAWwyIOI1S8h1z9x8itkJHSmA820/ElOQrQ63VN6EU9VcX+6fSUZt1OFCnwjjD2gwqLpwcc+xPVkyKhlQRKNon3s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1759896474; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=38kffkV2lErlC3uVWR4z9asPuoou/DTgCFhX2fGUa90=; b=gw88IIDOIwho1wWU+yewguSMjDjtt5VijjLcKk5kjrsFQCL7VghK0otQNb9pTAAydJgfrcAXBzqoGUdJvxcrEvJJfLaBFEXPYP4ugWRTGUhVKcUXqh9FaCAL14e6hE9lj9OvKlzwDXFtRj1QD0vTykwEIA/ppYa2967HnA8JyiY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1759896474889526.4894639983912; Tue, 7 Oct 2025 21:07:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v6LSk-0007I0-E7; Wed, 08 Oct 2025 00:07:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v6LSf-0007G9-SF for qemu-devel@nongnu.org; Wed, 08 Oct 2025 00:07:35 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1v6LSc-0005ri-90 for qemu-devel@nongnu.org; Wed, 08 Oct 2025 00:07:33 -0400 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-3f42b54d1b9so1730801f8f.0 for ; Tue, 07 Oct 2025 21:07:29 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Harsh Prateek Bora Reviewed-by: Andrew Jones --- include/system/kvm.h | 16 +++++++++------- target/i386/kvm/kvm.c | 6 +++--- target/loongarch/kvm/kvm.c | 4 ++-- target/mips/kvm.c | 6 +++--- target/ppc/kvm.c | 2 +- target/riscv/kvm/kvm-cpu.c | 2 +- target/s390x/kvm/kvm.c | 2 +- 7 files changed, 20 insertions(+), 18 deletions(-) diff --git a/include/system/kvm.h b/include/system/kvm.h index 4fc09e38910..8f9eecf044c 100644 --- a/include/system/kvm.h +++ b/include/system/kvm.h @@ -340,14 +340,16 @@ int kvm_arch_process_async_events(CPUState *cpu); =20 int kvm_arch_get_registers(CPUState *cpu, Error **errp); =20 -/* state subset only touched by the VCPU itself during runtime */ -#define KVM_PUT_RUNTIME_STATE 1 -/* state subset modified during VCPU reset */ -#define KVM_PUT_RESET_STATE 2 -/* full state set, modified during initialization or on vmload */ -#define KVM_PUT_FULL_STATE 3 +typedef enum kvm_put_state { + /* state subset only touched by the VCPU itself during runtime */ + KVM_PUT_RUNTIME_STATE =3D 1, + /* state subset modified during VCPU reset */ + KVM_PUT_RESET_STATE =3D 2, + /* full state set, modified during initialization or on vmload */ + KVM_PUT_FULL_STATE =3D 3, +} KvmPutState; =20 -int kvm_arch_put_registers(CPUState *cpu, int level, Error **errp); +int kvm_arch_put_registers(CPUState *cpu, KvmPutState level, Error **errp); =20 int kvm_arch_get_default_type(MachineState *ms); =20 diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 6a3a1c1ed8e..d06f55938cd 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3911,7 +3911,7 @@ static void kvm_init_msrs(X86CPU *cpu) assert(kvm_buf_set_msrs(cpu) =3D=3D 0); } =20 -static int kvm_put_msrs(X86CPU *cpu, int level) +static int kvm_put_msrs(X86CPU *cpu, KvmPutState level) { CPUX86State *env =3D &cpu->env; int i; @@ -5031,7 +5031,7 @@ static int kvm_get_apic(X86CPU *cpu) return 0; } =20 -static int kvm_put_vcpu_events(X86CPU *cpu, int level) +static int kvm_put_vcpu_events(X86CPU *cpu, KvmPutState level) { CPUState *cs =3D CPU(cpu); CPUX86State *env =3D &cpu->env; @@ -5274,7 +5274,7 @@ static int kvm_get_nested_state(X86CPU *cpu) return ret; } =20 -int kvm_arch_put_registers(CPUState *cpu, int level, Error **errp) +int kvm_arch_put_registers(CPUState *cpu, KvmPutState level, Error **errp) { X86CPU *x86_cpu =3D X86_CPU(cpu); int ret; diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c index 45292edcb1c..32cd7c5d003 100644 --- a/target/loongarch/kvm/kvm.c +++ b/target/loongarch/kvm/kvm.c @@ -325,7 +325,7 @@ static int kvm_loongarch_get_csr(CPUState *cs) return ret; } =20 -static int kvm_loongarch_put_csr(CPUState *cs, int level) +static int kvm_loongarch_put_csr(CPUState *cs, KvmPutState level) { int ret =3D 0; CPULoongArchState *env =3D cpu_env(cs); @@ -763,7 +763,7 @@ int kvm_arch_get_registers(CPUState *cs, Error **errp) return ret; } =20 -int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) +int kvm_arch_put_registers(CPUState *cs, KvmPutState level, Error **errp) { int ret; static int once; diff --git a/target/mips/kvm.c b/target/mips/kvm.c index 450947c3fa5..912cd5dfa0e 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -590,7 +590,7 @@ static void kvm_mips_update_state(void *opaque, bool ru= nning, RunState state) } } =20 -static int kvm_mips_put_fpu_registers(CPUState *cs, int level) +static int kvm_mips_put_fpu_registers(CPUState *cs, KvmPutState level) { CPUMIPSState *env =3D cpu_env(cs); int err, ret =3D 0; @@ -749,7 +749,7 @@ static int kvm_mips_get_fpu_registers(CPUState *cs) } =20 =20 -static int kvm_mips_put_cp0_registers(CPUState *cs, int level) +static int kvm_mips_put_cp0_registers(CPUState *cs, KvmPutState level) { CPUMIPSState *env =3D cpu_env(cs); int err, ret =3D 0; @@ -1177,7 +1177,7 @@ static int kvm_mips_get_cp0_registers(CPUState *cs) return ret; } =20 -int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) +int kvm_arch_put_registers(CPUState *cs, KvmPutState level, Error **errp) { CPUMIPSState *env =3D cpu_env(cs); struct kvm_regs regs; diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 2521ff65c6c..cd60893a17d 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -907,7 +907,7 @@ int kvmppc_put_books_sregs(PowerPCCPU *cpu) return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs); } =20 -int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) +int kvm_arch_put_registers(CPUState *cs, KvmPutState level, Error **errp) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 187c2c9501e..75ca3fb9fd9 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -1369,7 +1369,7 @@ int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int = state) return 0; } =20 -int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) +int kvm_arch_put_registers(CPUState *cs, KvmPutState level, Error **errp) { int ret =3D 0; =20 diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index 491cc5f9756..916dac1f14e 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -468,7 +468,7 @@ static int can_sync_regs(CPUState *cs, int regs) #define KVM_SYNC_REQUIRED_REGS (KVM_SYNC_GPRS | KVM_SYNC_ACRS | \ KVM_SYNC_CRS | KVM_SYNC_PREFIX) =20 -int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) +int kvm_arch_put_registers(CPUState *cs, KvmPutState level, Error **errp) { CPUS390XState *env =3D cpu_env(cs); struct kvm_fpu fpu =3D {}; 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Andrew Jones --- accel/kvm/kvm-all.c | 47 ++++++++++++++++++--------------------------- 1 file changed, 19 insertions(+), 28 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 58802f7c3cc..56031925c4e 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -2937,22 +2937,32 @@ void kvm_cpu_synchronize_state(CPUState *cpu) } } =20 -static void do_kvm_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_da= ta arg) +static bool kvm_cpu_synchronize_put(CPUState *cpu, KvmPutState state, + const char *desc) { Error *err =3D NULL; - int ret =3D kvm_arch_put_registers(cpu, KVM_PUT_RESET_STATE, &err); + int ret =3D kvm_arch_put_registers(cpu, state, &err); if (ret) { if (err) { - error_reportf_err(err, "Restoring resisters after reset: "); + error_reportf_err(err, "Restoring resisters %s: ", desc); } else { - error_report("Failed to put registers after reset: %s", + error_report("Failed to put registers %s: %s", desc, strerror(-ret)); } - cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); - vm_stop(RUN_STATE_INTERNAL_ERROR); + return false; } =20 cpu->vcpu_dirty =3D false; + + return true; +} + +static void do_kvm_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_da= ta arg) +{ + if (!kvm_cpu_synchronize_put(cpu, KVM_PUT_RESET_STATE, "after reset"))= { + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); + vm_stop(RUN_STATE_INTERNAL_ERROR); + } } =20 void kvm_cpu_synchronize_post_reset(CPUState *cpu) @@ -2966,19 +2976,9 @@ void kvm_cpu_synchronize_post_reset(CPUState *cpu) =20 static void do_kvm_cpu_synchronize_post_init(CPUState *cpu, run_on_cpu_dat= a arg) { - Error *err =3D NULL; - int ret =3D kvm_arch_put_registers(cpu, KVM_PUT_FULL_STATE, &err); - if (ret) { - if (err) { - error_reportf_err(err, "Putting registers after init: "); - } else { - error_report("Failed to put registers after init: %s", - strerror(-ret)); - } + if (!kvm_cpu_synchronize_put(cpu, KVM_PUT_FULL_STATE, "after init")) { exit(1); } - - cpu->vcpu_dirty =3D false; } =20 void kvm_cpu_synchronize_post_init(CPUState *cpu) @@ -3168,20 +3168,11 @@ int kvm_cpu_exec(CPUState *cpu) MemTxAttrs attrs; =20 if (cpu->vcpu_dirty) { - Error *err =3D NULL; - ret =3D kvm_arch_put_registers(cpu, KVM_PUT_RUNTIME_STATE, &er= r); - if (ret) { - if (err) { - error_reportf_err(err, "Putting registers after init: = "); - } else { - error_report("Failed to put registers after init: %s", - strerror(-ret)); - } + if (!kvm_cpu_synchronize_put(cpu, KVM_PUT_RUNTIME_STATE, + "at runtime")) { ret =3D -1; break; } - - cpu->vcpu_dirty =3D false; } =20 kvm_arch_pre_run(cpu, run); --=20 2.51.0