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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.78.205; envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1759868399884154100 Content-Type: text/plain; charset="utf-8" Disablement by default led to: ../hw/vmapple/vmapple.c:276:39: error: use of undeclared identifier 'GTIMER= _VIRT' 276 | qdev_connect_gpio_out(cpudev, GTIMER_VIRT, | ^ ../hw/vmapple/vmapple.c:479:54: error: use of undeclared identifier 'QEMU_P= SCI_CONDUIT_HVC' 479 | object_property_set_int(cpu, "psci-conduit", QEMU_PSCI_COND= UIT_HVC, | ^ ../hw/vmapple/vmapple.c:556:13: error: call to undeclared function 'arm_bui= ld_mp_affinity'; ISO C99 and later do not support implicit function declara= tions [-Wimplicit-function-declaration] 556 | arm_build_mp_affinity(n, GICV3_TARGETLIST_BITS); | ^ 3 errors generated. pretty quickly. Signed-off-by: Mohamed Mediouni --- hw/vmapple/vmapple.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/vmapple/vmapple.c b/hw/vmapple/vmapple.c index 16e6110b68..5928df4411 100644 --- a/hw/vmapple/vmapple.c +++ b/hw/vmapple/vmapple.c @@ -51,6 +51,8 @@ #include "system/reset.h" #include "system/runstate.h" #include "system/system.h" +#include "gtimer.h" +#include "cpu.h" =20 struct VMAppleMachineState { MachineState parent; --=20 2.50.1 (Apple Git-155) From nobody Fri Nov 14 22:21:15 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1759868426; cv=none; d=zohomail.com; s=zohoarc; b=G0SRXbXMXb2aZCeSVex05rU8Gy+wlvrC/q0xdCc4yMnu/a3YcWavjtYNUBptyjQy7fRMqtS2GC80gu1q23kHK40rSO44wgYHyM/qcZW43yUeGp0jNOrVNemkmMHRQQAKMxIR4OTjRTtVwK6D64bFWsSnGA0KrijxHAyZw8fDd10= ARC-Message-Signature: i=1; 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bh=vENZitnc2vAvbJskKACnmx35CqKa4UmkCEE6BrJVP9E=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=VKcY2tMhE2VbVsTMrM2k+2awGJZliWMurg/8DGUJRL7RUf1QCtF5iVQ3z/R+q/aFtAEzZBbQ1U+LFsF3j8pdD9k4NVnGLvx1b2y0MQ215VqhQxMmtHsbj0gzv3VWR++dkXmEeBFyaP7iFYzxwzGEBSHhbQHbFhHlXZIkgJlvvMrMYxjvIbv3syovp6rJ0PuhBZpW6bhR20OLfJjdun2hybq1DGlKN8kqsQMvrRmqFPbvDCDknvG0KAd5L2DYgsIsWLp/CJ+T9M/vNPUlXDMQGQPOyUDTsbecPhIuhZDOq23KOlYvHPTFh4eUs+EuiNhD4c160HtkyRqK5WTW5HfGRg== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , Alexander Graf , Phil Dennis-Jordan , Mads Ynddal , Cameron Esfahani , Roman Bolshakov , Mohamed Mediouni Subject: [RFC 2/4] hvf: arm64: add workaround for Apple M4 to run older macOS versions Date: Tue, 7 Oct 2025 22:18:35 +0200 Message-ID: <20251007201837.28992-3-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251007201837.28992-1-mohamed@unpredictable.fr> References: <20251007201837.28992-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: ixiariaFywUw4LnKmwM8Sr7Ic9h5EEsj X-Proofpoint-GUID: ixiariaFywUw4LnKmwM8Sr7Ic9h5EEsj X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA3MDE1OSBTYWx0ZWRfXxLrGqsh+3zWz pj0xyfxXaqYAfSugFNvglrIPu1nRhrRCOxdEkv9ElyD8ruuo5decxImylGmwknklvuocYHk4YaW mvX5+5FksExQl8KG43ZOFj/0z5m41W140V985imwanuaXHoFxfMOp13X4gr48C/da4kZR5Xn001 xfuyL4vV4JMZSZFdb9bBjkza/2slSTo/iVYlPOBN/jFUrLo7NKgsKIYi517pUOv+uZGWlv7M4zT OIxkatt01+bcoOgyXsh1fA0GadiWTD8rTN3wm9n245w6Mu4Ez7Vetb9+fPhDKUfJZZiK4s+Fs= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-07_02,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 bulkscore=0 mlxlogscore=927 clxscore=1030 adultscore=0 suspectscore=0 phishscore=0 malwarescore=0 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.22.0-2506270000 definitions=main-2510070159 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.78.196; envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1759868429962154100 Content-Type: text/plain; charset="utf-8" Apple M4 removes FEAT_SSBS. However, older macOS releases do misbehave in such a configuration and do not boot. Use private API to trap SCTLR_EL1 accesses through FGT. Signed-off-by: Mohamed Mediouni --- accel/hvf/hvf-accel-ops.c | 4 +-- include/system/hvf_int.h | 4 +++ target/arm/hvf/hvf.c | 71 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 77 insertions(+), 2 deletions(-) diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index 8b794c2d41..64d7afc3bf 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -152,8 +152,8 @@ static int hvf_init_vcpu(CPUState *cpu) sigdelset(&cpu->accel->unblock_ipi_mask, SIG_IPI); =20 #ifdef __aarch64__ - r =3D hv_vcpu_create(&cpu->accel->fd, - (hv_vcpu_exit_t **)&cpu->accel->exit, NULL); + r =3D hvf_vcpu_create(&cpu->accel->fd, + (hv_vcpu_exit_t **)&cpu->accel->exit); #else r =3D hv_vcpu_create(&cpu->accel->fd, HV_VCPU_DEFAULT); #endif diff --git a/include/system/hvf_int.h b/include/system/hvf_int.h index a3b06a3e75..baee11d478 100644 --- a/include/system/hvf_int.h +++ b/include/system/hvf_int.h @@ -111,4 +111,8 @@ void hvf_arch_update_guest_debug(CPUState *cpu); */ bool hvf_arch_supports_guest_debug(void); =20 +#ifdef __aarch64__ +hv_return_t hvf_vcpu_create(hv_vcpu_t* vcpu_ptr, hv_vcpu_exit_t ** exit); +#endif + #endif diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 0658a99a2d..99daba036b 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -22,6 +22,7 @@ #include "cpu-sysregs.h" =20 #include +#include =20 #include "system/address-spaces.h" #include "system/memory.h" @@ -138,11 +139,14 @@ static inline int hvf_arm_num_wrps(hv_vcpu_config_t c= onfig) return FIELD_EX64(val, ID_AA64DFR0, WRPS) + 1; } =20 +void _hv_vcpu_config_set_fgt_enabled(hv_vcpu_config_t cfg, bool enabled); void hvf_arm_init_debug(void) { hv_vcpu_config_t config; config =3D hv_vcpu_config_create(); =20 + _hv_vcpu_config_set_fgt_enabled(config, true); + max_hw_bps =3D hvf_arm_num_brps(config); hw_breakpoints =3D g_array_sized_new(true, true, sizeof(HWBreakpoint), max_hw_bps); @@ -292,6 +296,8 @@ void hvf_arm_init_debug(void) #define SYSREG_DBGWVR15_EL1 SYSREG(2, 0, 0, 15, 6) #define SYSREG_DBGWCR15_EL1 SYSREG(2, 0, 0, 15, 7) =20 +#define SYSREG_SCTLR_EL1 SYSREG(3, 0, 1, 0, 0) + #define WFX_IS_WFE (1 << 0) =20 #define TMR_CTL_ENABLE (1 << 0) @@ -1320,6 +1326,9 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t re= g, uint64_t *val) case SYSREG_DBGWCR15_EL1: *val =3D env->cp15.dbgwcr[SYSREG_CRM(reg)]; return 0; + case SYSREG_SCTLR_EL1: + *val =3D env->cp15.sctlr_el[1] | SCTLR_DSSBS_64; + return 0; default: if (is_id_sysreg(reg)) { /* ID system registers read as RES0 */ @@ -1643,6 +1652,10 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t = reg, uint64_t val) case SYSREG_DBGWCR15_EL1: env->cp15.dbgwcr[SYSREG_CRM(reg)] =3D val; return 0; + case SYSREG_SCTLR_EL1: + env->cp15.sctlr_el[1] =3D val; + assert_hvf_ok(hv_vcpu_set_sys_reg(cpu->accel->fd, HV_SYS_REG_SCTLR= _EL1, val & ~SCTLR_DSSBS_64)); + return 0; } =20 cpu_synchronize_state(cpu); @@ -2244,3 +2257,61 @@ bool hvf_arch_supports_guest_debug(void) { return true; } + +/* + * Apple M4 removes FEAT_SSBS. However, older macOS releases + * do misbehave in such a configuration and do not boot. + * + * Using private API to trap SCTLR_EL1 accesses through FGT. + */ + +void _hv_vcpu_config_set_fgt_enabled(hv_vcpu_config_t cfg, bool enabled); +#define HV_CONTROL_FIELD_HFGRTR 0xb +#define HV_CONTROL_FIELD_HFGWTR 0xc +hv_return_t _hv_vcpu_get_control_field(hv_vcpu_t vcpu, int field, uint64_t= * value); +hv_return_t _hv_vcpu_set_control_field(hv_vcpu_t vcpu, int field, uint64_t= value); + +static bool hvf_is_ssbs_implemented(void) { + int has_ssbs =3D -1; + size_t has_ssbs_sz =3D sizeof(has_ssbs); + if (sysctlbyname("hw.optional.arm.FEAT_SSBS", &has_ssbs, &has_ssbs_sz,= NULL, 0) =3D=3D -1) { + has_ssbs =3D 0; + } + return has_ssbs; +} + +hv_return_t hvf_vcpu_create(hv_vcpu_t* vcpu_ptr, hv_vcpu_exit_t ** exit) +{ + hv_return_t r; + hv_vcpu_t vcpu; + uint64_t hfgwtr_el1, hfgrtr_el1; + + hv_vcpu_config_t config; + config =3D hv_vcpu_config_create(); + if (!hvf_is_ssbs_implemented()) { + _hv_vcpu_config_set_fgt_enabled(config, true); + } + + r =3D hv_vcpu_create(&vcpu, (hv_vcpu_exit_t **)exit, config); + + if (hvf_is_ssbs_implemented()) { + return r; + } + + assert_hvf_ok(_hv_vcpu_get_control_field(vcpu, HV_CONTROL_FIELD_HFGWTR= ,&hfgwtr_el1)); + assert_hvf_ok(_hv_vcpu_set_control_field(vcpu, HV_CONTROL_FIELD_HFGWTR, + hfgwtr_el1 | R_HFGWTR_EL2_SCTLR_EL1_MASK)); + assert_hvf_ok(_hv_vcpu_get_control_field(vcpu, HV_CONTROL_FIELD_HFGWTR, + &hfgwtr_el1)); + + assert_hvf_ok(_hv_vcpu_get_control_field(vcpu, HV_CONTROL_FIELD_HFGRTR, + &hfgrtr_el1)); + assert_hvf_ok(_hv_vcpu_set_control_field(vcpu, HV_CONTROL_FIELD_HFGRTR, + hfgrtr_el1 | R_HFGRTR_EL2_SCTLR_EL1_MASK)); + assert_hvf_ok(_hv_vcpu_get_control_field(vcpu, HV_CONTROL_FIELD_HFGRTR, + &hfgrtr_el1)); + + *vcpu_ptr =3D vcpu; + + return r; +} --=20 2.50.1 (Apple Git-155) From nobody Fri Nov 14 22:21:15 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.78.142; envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1759868388949154100 Content-Type: text/plain; charset="utf-8" Follow changes in memory management, and enable process isolation for a san= dboxed GPU process when on a new OS. Signed-off-by: Mohamed Mediouni --- hw/display/apple-gfx-mmio.m | 56 +++++++++++++++++++++++++++---------- hw/display/apple-gfx.h | 13 +++++++++ hw/display/apple-gfx.m | 42 +++++++++++++++++++++++++++- 3 files changed, 95 insertions(+), 16 deletions(-) diff --git a/hw/display/apple-gfx-mmio.m b/hw/display/apple-gfx-mmio.m index b0b6e2993e..728441d490 100644 --- a/hw/display/apple-gfx-mmio.m +++ b/hw/display/apple-gfx-mmio.m @@ -19,6 +19,7 @@ #include "hw/irq.h" #include "apple-gfx.h" #include "trace.h" +#include "system/address-spaces.h" =20 #import =20 @@ -34,14 +35,25 @@ typedef bool(^IOSFCMapMemory)(uint64_t phys, uint64_t len, bool ro, void *= *va, void *, void *); =20 +@interface PGMemoryMapDescriptor : NSObject +-(void)addRange:(struct PGGuestPhysicalRange_s) range; +@end + @interface PGDeviceDescriptor (IOSurfaceMapper) @property (readwrite, nonatomic) bool usingIOSurfaceMapper; +@property (readwrite, nonatomic) bool enableArgumentBuffers; +@property (readwrite, nonatomic) bool enableProcessIsolation; +@property (readwrite, nonatomic) bool enableProtectedContent; + +@property (readwrite, nonatomic, copy, nullable) PGMemoryMapDescriptor* me= moryMapDescriptor; @end =20 @interface PGIOSurfaceHostDeviceDescriptor : NSObject -(PGIOSurfaceHostDeviceDescriptor *)init; @property (readwrite, nonatomic, copy, nullable) IOSFCMapMemory mapMemory; @property (readwrite, nonatomic, copy, nullable) IOSFCUnmapMemory unmapMem= ory; +@property (readwrite, nonatomic, copy, nullable) PGMemoryMapDescriptor* me= moryMapDescriptor; +@property (readwrite, nonatomic) unsigned long long mmioLength; @property (readwrite, nonatomic, copy, nullable) IOSFCRaiseInterrupt raise= Interrupt; @end =20 @@ -182,20 +194,28 @@ static bool apple_gfx_mmio_unmap_surface_memory(void = *ptr) PGIOSurfaceHostDeviceDescriptor *iosfc_desc =3D [PGIOSurfaceHostDeviceDescriptor new]; PGIOSurfaceHostDevice *iosfc_host_dev; - - iosfc_desc.mapMemory =3D - ^bool(uint64_t phys, uint64_t len, bool ro, void **va, void *e, vo= id *f) { - *va =3D apple_gfx_mmio_map_surface_memory(phys, len, ro); - - trace_apple_gfx_iosfc_map_memory(phys, len, ro, va, e, f, *va); - - return *va !=3D NULL; - }; - - iosfc_desc.unmapMemory =3D - ^bool(void *va, void *b, void *c, void *d, void *e, void *f) { - return apple_gfx_mmio_unmap_surface_memory(va); - }; + PGMemoryMapDescriptor* memoryMapDescriptor =3D [PGMemoryMapDescriptor = new]; + + if (@available(macOS 15.4, *)) { + FlatView* fv =3D address_space_to_flatview(&address_space_memory); + flatview_for_each_range(fv, apple_gfx_register_memory_cb, memoryMa= pDescriptor); + iosfc_desc.mmioLength =3D 0x10000; + iosfc_desc.memoryMapDescriptor =3D memoryMapDescriptor; + } else { + iosfc_desc.mapMemory =3D + ^bool(uint64_t phys, uint64_t len, bool ro, void **va, void *e= , void *f) { + *va =3D apple_gfx_mmio_map_surface_memory(phys, len, ro); + + trace_apple_gfx_iosfc_map_memory(phys, len, ro, va, e, f, = *va); + + return *va !=3D NULL; + }; + + iosfc_desc.unmapMemory =3D + ^bool(void *va, void *b, void *c, void *d, void *e, void *f) { + return apple_gfx_mmio_unmap_surface_memory(va); + }; + } =20 iosfc_desc.raiseInterrupt =3D ^bool(uint32_t vector) { trace_apple_gfx_iosfc_raise_irq(vector); @@ -223,13 +243,19 @@ static void apple_gfx_mmio_realize(DeviceState *dev, = Error **errp) }; =20 desc.usingIOSurfaceMapper =3D true; - s->pgiosfc =3D apple_gfx_prepare_iosurface_host_device(s); + desc.enableArgumentBuffers =3D true; + // Process isolation needs to go through PGMemoryMapDescriptor + if (@available(macOS 15.4, *)) { + desc.enableProcessIsolation =3D true; + } =20 if (!apple_gfx_common_realize(&s->common, dev, desc, errp)) { [s->pgiosfc release]; s->pgiosfc =3D nil; } =20 + s->pgiosfc =3D apple_gfx_prepare_iosurface_host_device(s); + [desc release]; desc =3D nil; } diff --git a/hw/display/apple-gfx.h b/hw/display/apple-gfx.h index a8b1d1efc0..0f7cf33adf 100644 --- a/hw/display/apple-gfx.h +++ b/hw/display/apple-gfx.h @@ -23,6 +23,13 @@ @protocol MTLTexture; @protocol MTLCommandQueue; =20 +typedef struct PGGuestPhysicalRange_s +{ + uint64_t physicalAddress; + uint64_t physicalLength; + void *hostAddress; +} PGGuestPhysicalRange_t; + typedef QTAILQ_HEAD(, PGTask_s) PGTaskList; =20 typedef struct AppleGFXDisplayMode { @@ -68,6 +75,12 @@ void *apple_gfx_host_ptr_for_gpa_range(uint64_t guest_ph= ysical, uint64_t length, bool read_only, MemoryRegion **mapping_in_region); =20 +bool apple_gfx_register_memory_cb(Int128 start, + Int128 len, + const MemoryRegion *mr, + hwaddr offset_in_region, + void *opaque); + extern const PropertyInfo qdev_prop_apple_gfx_display_mode; =20 #endif diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m index 174d56ae05..238b227176 100644 --- a/hw/display/apple-gfx.m +++ b/hw/display/apple-gfx.m @@ -21,6 +21,7 @@ #include "system/address-spaces.h" #include "system/dma.h" #include "migration/blocker.h" +#include "system/memory.h" #include "ui/console.h" #include "apple-gfx.h" #include "trace.h" @@ -596,6 +597,41 @@ void apple_gfx_common_init(Object *obj, AppleGFXState = *s, const char* obj_name) /* TODO: PVG framework supports serialising device state: integrate it= ! */ } =20 +@interface PGMemoryMapDescriptor : NSObject +-(void)addRange:(struct PGGuestPhysicalRange_s) range; +@end + +@interface PGDeviceDescriptor (IOSurfaceMapper) +@property (readwrite, nonatomic, copy, nullable) PGMemoryMapDescriptor* me= moryMapDescriptor; +@end + +bool apple_gfx_register_memory_cb(Int128 start, + Int128 len, + const MemoryRegion *mr, + hwaddr offset_in_region, + void *opaque) { + PGGuestPhysicalRange_t range; + PGMemoryMapDescriptor* memoryMapDescriptor =3D opaque; + if (mr->ram) { + range.physicalAddress =3D start; + range.physicalLength =3D len; + range.hostAddress =3D memory_region_get_ram_ptr(mr); + [memoryMapDescriptor addRange:range]; + } + return false; +} + +static void apple_gfx_register_memory(AppleGFXState *s, + PGDeviceDescriptor *d= esc) +{ + PGMemoryMapDescriptor* memoryMapDescriptor =3D [PGMemoryMapDescriptor = new]; + + FlatView* fv =3D address_space_to_flatview(&address_space_memory); + flatview_for_each_range(fv, apple_gfx_register_memory_cb, memoryMapDes= criptor); + + desc.memoryMapDescriptor =3D memoryMapDescriptor; +} + static void apple_gfx_register_task_mapping_handlers(AppleGFXState *s, PGDeviceDescriptor *d= esc) { @@ -763,7 +799,11 @@ bool apple_gfx_common_realize(AppleGFXState *s, Device= State *dev, =20 desc.device =3D s->mtl; =20 - apple_gfx_register_task_mapping_handlers(s, desc); + if (@available(macOS 15.4, *)) { + apple_gfx_register_memory(s, desc); + } else { + apple_gfx_register_task_mapping_handlers(s, desc); + } =20 s->cursor_show =3D true; =20 --=20 2.50.1 (Apple Git-155) From nobody Fri Nov 14 22:21:15 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1759868384; cv=none; d=zohomail.com; s=zohoarc; b=a15w0efeLCpvN4HfOdBSsPPo3sGeguwyoLnrUuEXOrDWPLinhFrLfUB2BE4RVtZKmIcxFrhaTJsd/nMmHj3mv13CVWYNqdxhFIlLZuflKM6UAehXI209dtmaLkh4xbAbuBxZSUC6DvdSXHFBHQouNJY9Rkigd/8Zv2mTZ6pkX+o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1759868384; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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charset="utf-8" This reverts commit 49551752e860f5e403cdacac11ee1d218141fd3d. Signed-off-by: Mohamed Mediouni --- configs/devices/aarch64-softmmu/default.mak | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/devices/aarch64-softmmu/default.mak b/configs/devices/= aarch64-softmmu/default.mak index ad8028cfd4..93f4022ad6 100644 --- a/configs/devices/aarch64-softmmu/default.mak +++ b/configs/devices/aarch64-softmmu/default.mak @@ -9,4 +9,3 @@ include ../arm-softmmu/default.mak # CONFIG_XLNX_VERSAL=3Dn # CONFIG_SBSA_REF=3Dn # CONFIG_NPCM8XX=3Dn -CONFIG_VMAPPLE=3Dn --=20 2.50.1 (Apple Git-155)