From nobody Fri Nov 14 23:28:50 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1759846453; cv=none; d=zohomail.com; s=zohoarc; b=oDGyHpvkD81FDiiL2Fni9WTO9t/VZHx33J7cfe05LwEJt3Gz0/J0HGSNEhX+3FqcYDHWLfrylkxJsWyxxcvDJqNKz1FRflnGwjOCW3CLEOw6xkaZh63ZarWYHcSc1E+6cf3cnVhFmWqBAxlbwM4zUh/j5zXeE0OSJRoqC6axbJ0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1759846453; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=m81jBq+TZRGnncpvfOYaW8BHhoN2W0VmjCta5UEVW9g=; b=PMpnFjurAVCySIJ2ZKTc5xWuJDzPe2Zqa2Zw1KyvqzlxawpqDD/dHpsr3nHRwB2brY7+sz6BUiFk790Jplre87PS2gI0BT0B9wklpCt1JelGl+MpsnPnB3Z+vvA1ZJBGzprSe4iEqHA+i4lfQIpLhrco8yjRPB7VlSKM47bEEEo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1759846453947917.4218382093035; Tue, 7 Oct 2025 07:14:13 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v68Qx-00063C-Ei; Tue, 07 Oct 2025 10:12:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v68QV-0005ow-Hc for qemu-devel@nongnu.org; Tue, 07 Oct 2025 10:12:29 -0400 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1v68QA-0002Ez-Qu for qemu-devel@nongnu.org; Tue, 07 Oct 2025 10:12:26 -0400 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-46e2826d5c6so49128015e9.1 for ; Tue, 07 Oct 2025 07:12:03 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e78c5d290sm167037135e9.0.2025.10.07.07.11.58 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 07:11:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1759846320; x=1760451120; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=m81jBq+TZRGnncpvfOYaW8BHhoN2W0VmjCta5UEVW9g=; b=lVHYY8S1zRT9oOfnNTp+goQXc6pdB94yIbv4zIVzTcDg2eGWSn02pFzL+33bh7EUcN zwbTCje0H0pLUm7r5TiJEDaZ+mE/ptaColX1NdLXdunDam+z8hOE87MOf67COIgM43ZY 3WvFugMTHkewAo50Hsq18gWhtlL2Bp/y5G9r6+Hr71CYHqcJsaXO8zUJsaMm9FGMJ+09 UXOwleohLLEdLo+Sbo+COfBX4CeejIk48kt5q2BwJW+zexWXGXtMYUzCxwTxkC/vxdQh DZ7RAYRxhIoU+7ZDXblWr7/TKCmAOn5wj7yutUSc6VryJABksgvltMN9zKUymoz16p41 1U7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759846320; x=1760451120; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=m81jBq+TZRGnncpvfOYaW8BHhoN2W0VmjCta5UEVW9g=; b=i3qUL9zulatCD5QdQxss2rraDUggmOeQgU5Geq5IqsF3n86gJv3kYx8aKUpT2vi4qa yxHHdwU0tcdFvthk7sAZ88/dQ7EreVATRio7Q5yKBDfwrjEy5C/Scrqxjr7iCimOmRWd 8J47iwbdGVByr/x2Yk+/mOQo+QygkjRuUJn6QrTeTgyKdWt4ACWRFA1ZMzML1TOM0Ac7 rshAj1saa3FKZoOxjbezjVNwLcoEb8AOASfgvGp6kqe7Q+L2JdHX+TPhLiE0BQ5VcFbd 0cP7jOlBwmuSQg2SICS+M4tXkGsi9tRDpMHjvmJMRJbQRK7+GnEeZD1cl/YKH82gTDbb qqYw== X-Gm-Message-State: AOJu0Yzr9maUjQ0CWHZsXxRkfPPPJa2h3XMV7s8a1f8abLNTzWk8VqMY jFzJvJhuYA15TvpPV5Q4A/UiJCht5e2WE9LKfBtisnY1We597Jne+197F8C/oPM5KA2t7k0eNj1 TNrLY X-Gm-Gg: ASbGncurZxPrP7DXu46zUqDWjUB/UP6SdeTimQ1/GtjIqVv3WLHq6GQnxU12QH6GHY/ iVKp2SEhokCN0/sFuThxB8vLCpntHv1gCHnfKzhOxRh3nRB0ntban8F89+npZLmF7N06H9EHcTh Oa6AmJj5BA6HqdRvNfnq53qhZbRfyqC8pDAzKx/MOkHy2AxMKFqL7xlP8GQ6TW4qBJ6NJogYqKM LADmZ+wBQ3/bWu4/q8kCWgU55eg++jhx9XXm6qT3loLJ5fAfEwxStBETYfBPDYr8J/zCloqSdQZ okCdTmpXkVhfYhiwBWuky+Tiu8Q7GafVgQ9U5sNdMH0hcU+cFElRXvljFHIdVh89NQyvs75m79k FNuLVZu+Sz8OrpkX7PoFhLH6YFiEE6YR+DU7s9vxBoGBhNZwDEGZvbfFzaUebFYDuGfk= X-Google-Smtp-Source: AGHT+IHW18lvoUCiObbQD7xp+GDZZd9cK6JT5FY914p71hs3Sp4rMM8sybeqGl9U7zBD+z4zfKGLZQ== X-Received: by 2002:a05:600d:41f3:b0:46e:3e63:9a8e with SMTP id 5b1f17b1804b1-46e7114735amr105744285e9.26.1759846319755; Tue, 07 Oct 2025 07:11:59 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 32/62] hw/misc/xlnx-versal-crl: split into base/concrete classes Date: Tue, 7 Oct 2025 15:10:52 +0100 Message-ID: <20251007141123.3239867-33-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251007141123.3239867-1-peter.maydell@linaro.org> References: <20251007141123.3239867-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1759846462178116600 From: Luc Michel Split the TYPE_XLNX_VERSAL_CRL type into base and concrete classes. This is in preparation for the versal2 version of the CRL. Signed-off-by: Luc Michel Reviewed-by: Francisco Iglesias Reviewed-by: Edgar E. Iglesias Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20250926070806.292065-32-luc.michel@amd.com Signed-off-by: Peter Maydell --- include/hw/misc/xlnx-versal-crl.h | 31 ++++++++++++++++++-- hw/misc/xlnx-versal-crl.c | 48 +++++++++++++++++++------------ 2 files changed, 58 insertions(+), 21 deletions(-) diff --git a/include/hw/misc/xlnx-versal-crl.h b/include/hw/misc/xlnx-versa= l-crl.h index dba6d3585d1..2b39d203a67 100644 --- a/include/hw/misc/xlnx-versal-crl.h +++ b/include/hw/misc/xlnx-versal-crl.h @@ -2,6 +2,7 @@ * QEMU model of the Clock-Reset-LPD (CRL). * * Copyright (c) 2022 Xilinx Inc. + * Copyright (c) 2025 Advanced Micro Devices, Inc. * SPDX-License-Identifier: GPL-2.0-or-later * * Written by Edgar E. Iglesias @@ -12,8 +13,13 @@ #include "hw/sysbus.h" #include "hw/register.h" #include "target/arm/cpu-qom.h" +#include "hw/arm/xlnx-versal-version.h" =20 +#define TYPE_XLNX_VERSAL_CRL_BASE "xlnx-versal-crl-base" #define TYPE_XLNX_VERSAL_CRL "xlnx-versal-crl" + +OBJECT_DECLARE_TYPE(XlnxVersalCRLBase, XlnxVersalCRLBaseClass, + XLNX_VERSAL_CRL_BASE) OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCRL, XLNX_VERSAL_CRL) =20 REG32(ERR_CTRL, 0x0) @@ -216,8 +222,19 @@ REG32(PSM_RST_MODE, 0x370) =20 #define RPU_MAX_CPU 2 =20 -struct XlnxVersalCRL { +struct XlnxVersalCRLBase { SysBusDevice parent_obj; + + RegisterInfoArray *reg_array; + uint32_t *regs; +}; + +struct XlnxVersalCRLBaseClass { + SysBusDeviceClass parent_class; +}; + +struct XlnxVersalCRL { + XlnxVersalCRLBase parent_obj; qemu_irq irq; =20 struct { @@ -228,8 +245,18 @@ struct XlnxVersalCRL { DeviceState *usb; } cfg; =20 - RegisterInfoArray *reg_array; uint32_t regs[CRL_R_MAX]; RegisterInfo regs_info[CRL_R_MAX]; }; + +static inline const char *xlnx_versal_crl_class_name(VersalVersion ver) +{ + switch (ver) { + case VERSAL_VER_VERSAL: + return TYPE_XLNX_VERSAL_CRL; + default: + g_assert_not_reached(); + } +} + #endif diff --git a/hw/misc/xlnx-versal-crl.c b/hw/misc/xlnx-versal-crl.c index f288545967a..be89e0da40d 100644 --- a/hw/misc/xlnx-versal-crl.c +++ b/hw/misc/xlnx-versal-crl.c @@ -298,7 +298,7 @@ static const RegisterAccessInfo crl_regs_info[] =3D { } }; =20 -static void crl_reset_enter(Object *obj, ResetType type) +static void versal_crl_reset_enter(Object *obj, ResetType type) { XlnxVersalCRL *s =3D XLNX_VERSAL_CRL(obj); unsigned int i; @@ -308,7 +308,7 @@ static void crl_reset_enter(Object *obj, ResetType type) } } =20 -static void crl_reset_hold(Object *obj, ResetType type) +static void versal_crl_reset_hold(Object *obj, ResetType type) { XlnxVersalCRL *s =3D XLNX_VERSAL_CRL(obj); =20 @@ -325,20 +325,22 @@ static const MemoryRegionOps crl_ops =3D { }, }; =20 -static void crl_init(Object *obj) +static void versal_crl_init(Object *obj) { XlnxVersalCRL *s =3D XLNX_VERSAL_CRL(obj); + XlnxVersalCRLBase *xvcb =3D XLNX_VERSAL_CRL_BASE(obj); SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); int i; =20 - s->reg_array =3D + xvcb->reg_array =3D register_init_block32(DEVICE(obj), crl_regs_info, ARRAY_SIZE(crl_regs_info), s->regs_info, s->regs, &crl_ops, XLNX_VERSAL_CRL_ERR_DEBUG, CRL_R_MAX * 4); - sysbus_init_mmio(sbd, &s->reg_array->mem); + xvcb->regs =3D s->regs; + sysbus_init_mmio(sbd, &xvcb->reg_array->mem); sysbus_init_irq(sbd, &s->irq); =20 for (i =3D 0; i < ARRAY_SIZE(s->cfg.cpu_r5); ++i) { @@ -377,11 +379,11 @@ static void crl_init(Object *obj) =20 static void crl_finalize(Object *obj) { - XlnxVersalCRL *s =3D XLNX_VERSAL_CRL(obj); + XlnxVersalCRLBase *s =3D XLNX_VERSAL_CRL_BASE(obj); register_finalize_block(s->reg_array); } =20 -static const VMStateDescription vmstate_crl =3D { +static const VMStateDescription vmstate_versal_crl =3D { .name =3D TYPE_XLNX_VERSAL_CRL, .version_id =3D 1, .minimum_version_id =3D 1, @@ -391,29 +393,37 @@ static const VMStateDescription vmstate_crl =3D { } }; =20 -static void crl_class_init(ObjectClass *klass, const void *data) +static void versal_crl_class_init(ObjectClass *klass, const void *data) { - ResettableClass *rc =3D RESETTABLE_CLASS(klass); DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); =20 - dc->vmsd =3D &vmstate_crl; - - rc->phases.enter =3D crl_reset_enter; - rc->phases.hold =3D crl_reset_hold; + dc->vmsd =3D &vmstate_versal_crl; + rc->phases.enter =3D versal_crl_reset_enter; + rc->phases.hold =3D versal_crl_reset_hold; } =20 -static const TypeInfo crl_info =3D { - .name =3D TYPE_XLNX_VERSAL_CRL, +static const TypeInfo crl_base_info =3D { + .name =3D TYPE_XLNX_VERSAL_CRL_BASE, .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_size =3D sizeof(XlnxVersalCRL), - .class_init =3D crl_class_init, - .instance_init =3D crl_init, + .instance_size =3D sizeof(XlnxVersalCRLBase), + .class_size =3D sizeof(XlnxVersalCRLBaseClass), .instance_finalize =3D crl_finalize, + .abstract =3D true, +}; + +static const TypeInfo versal_crl_info =3D { + .name =3D TYPE_XLNX_VERSAL_CRL, + .parent =3D TYPE_XLNX_VERSAL_CRL_BASE, + .instance_size =3D sizeof(XlnxVersalCRL), + .instance_init =3D versal_crl_init, + .class_init =3D versal_crl_class_init, }; =20 static void crl_register_types(void) { - type_register_static(&crl_info); + type_register_static(&crl_base_info); + type_register_static(&versal_crl_info); } =20 type_init(crl_register_types) --=20 2.43.0