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Add XLXN_ZYNQMP prefix as it's now public. Signed-off-by: Cl=C3=A9ment Chigot Reviewed-by: Edgar E. Iglesias --- hw/arm/xlnx-zynqmp.c | 11 +++++------ include/hw/arm/xlnx-zynqmp.h | 1 + 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index ec96a46eec..d7adc070f8 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -26,8 +26,6 @@ #include "target/arm/cpu-qom.h" #include "target/arm/gtimer.h" =20 -#define GIC_NUM_SPI_INTR 160 - #define ARM_PHYS_TIMER_PPI 30 #define ARM_VIRT_TIMER_PPI 27 #define ARM_HYP_TIMER_PPI 26 @@ -206,7 +204,7 @@ static const XlnxZynqMPGICRegion xlnx_zynqmp_gic_region= s[] =3D { =20 static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index) { - return GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index; + return XLNX_ZYNQMP_GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_inde= x; } =20 static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s, @@ -454,7 +452,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error= **errp) int num_apus =3D MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS); const char *boot_cpu =3D s->boot_cpu ? s->boot_cpu : "apu-cpu[0]"; ram_addr_t ddr_low_size, ddr_high_size; - qemu_irq gic_spi[GIC_NUM_SPI_INTR]; + qemu_irq gic_spi[XLNX_ZYNQMP_GIC_NUM_SPI_INTR]; Error *err =3D NULL; =20 ram_size =3D memory_region_size(s->ddr_ram); @@ -502,7 +500,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error= **errp) g_free(ocm_name); } =20 - qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", GIC_NUM_SPI_INTR + 32= ); + qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", + XLNX_ZYNQMP_GIC_NUM_SPI_INTR + 32); qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2); qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", num_apus); qdev_prop_set_bit(DEVICE(&s->gic), "has-security-extensions", s->secur= e); @@ -613,7 +612,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error= **errp) return; } =20 - for (i =3D 0; i < GIC_NUM_SPI_INTR; i++) { + for (i =3D 0; i < XLNX_ZYNQMP_GIC_NUM_SPI_INTR; i++) { gic_spi[i] =3D qdev_get_gpio_in(DEVICE(&s->gic), i); } =20 diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index c137ac59e8..6a407c2962 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -67,6 +67,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP) #define XLNX_ZYNQMP_OCM_RAM_SIZE 0x10000 =20 #define XLNX_ZYNQMP_GIC_REGIONS 6 +#define XLNX_ZYNQMP_GIC_NUM_SPI_INTR 160 =20 /* * ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k off= sets --=20 2.34.1