From nobody Fri Nov 14 23:31:39 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1759117493; cv=none; d=zohomail.com; s=zohoarc; b=GffPEFi8WKu2HRzMClvmC87i6+IU5xDtkGyrktQHDcDM7eWzprna2c2zYOVnHjKVR2H3ExvPbpTQ4STXRgiy9Y8i1D1IbZV1Nc8sD12UehGHkPZJ35Ns4AEv7I9ES+Vm43SHbg1mh6gw9X2oXJ6XTGJc27m7h9zRX5RU6FT1W0U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1759117493; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=oAedh4geeKuYHo1k0nNE2BBrQik3eJ3+shWqgLZbBjc=; b=kU1JOCqQEDBJd+1iPbyvsg3bC9aBRA1k5XnDiZuCliatUwiMXGVqegjomxnmlJeH+ScOrScdhEDySELe/OH149VxXplOrH+qlz1n65XQMrI23lHs3BmuQDgyHnU85Y2CH3cou+31oX0uxA6EhXp5glKytlthP/WkGOPfHQ1s51Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 175911749336872.00153679583559; Sun, 28 Sep 2025 20:44:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v34n8-0001Qv-PM; Sun, 28 Sep 2025 23:43:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v34n7-0001Pn-3P for qemu-devel@nongnu.org; Sun, 28 Sep 2025 23:43:09 -0400 Received: from mgamail.intel.com ([198.175.65.15]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v34my-0007dc-Re for qemu-devel@nongnu.org; Sun, 28 Sep 2025 23:43:08 -0400 Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2025 20:42:50 -0700 Received: from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2025 20:42:48 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1759117381; x=1790653381; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yK2dpmDEopeGqU1aW0wmSFvM9vPYzMUMJFcs4x1WVUU=; b=KoAhsP57uWwRNZYwaXTM1vNYYRfmACeCR2irZLs00EFSDN2H0oI/ac0H 42h9Bqs/LnDGnEy2UOJWVY7Z6Alap0OzvFRG3b5UaRvatCvYz7heFsBk5 HQ4j2gMykMd59S3aLl9L02HUo5c32BclL0LkLltjRPMTvjdkPpOsJe+jR 671WENPa9s9a4vM6vZnzGmE+xj/+Gn/OCo/VmWUWE3z9vVwjhPsuwEVFG f8He2EhS5m5Bql8qaj5ydNGTwPVspCkf4FqUcNj3rz7eLBdziv7C8UuaQ G+JtdQjl7C7iR5GmqjGgcx0iTEZyp52JFySNQ7SlRYYfqhMHrdaD0Bjpn Q==; X-CSE-ConnectionGUID: i8t2NXp7Q9G+5+IhG61ofQ== X-CSE-MsgGUID: 4lxmVHdhQ16SQigi1gCqUQ== X-IronPort-AV: E=McAfee;i="6800,10657,11567"; a="64989290" X-IronPort-AV: E=Sophos;i="6.18,300,1751266800"; d="scan'208";a="64989290" X-CSE-ConnectionGUID: 2LLSf/YtR32fR5k8KFMO5A== X-CSE-MsgGUID: MzjlhEiOTquDaMxbBVnZQw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,300,1751266800"; d="scan'208";a="178865048" From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com, yi.l.liu@intel.com, clement.mathieu--drif@eviden.com, Zhenzhong Duan Subject: [PATCH v2 1/3] intel_iommu: Enable Enhanced Set Root Table Pointer Support (ESRTPS) Date: Sun, 28 Sep 2025 23:42:04 -0400 Message-ID: <20250929034206.439266-2-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250929034206.439266-1-zhenzhong.duan@intel.com> References: <20250929034206.439266-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.15; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -48 X-Spam_score: -4.9 X-Spam_bar: ---- X-Spam_report: (-4.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.539, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1759117496552116600 According to VTD spec rev 4.1 section 6.6: "For implementations reporting the Enhanced Set Root Table Pointer Support (ESRTPS) field as Clear, on a 'Set Root Table Pointer' operation, software must perform a global invalidate of the context cache, PASID-cache (if applicable), and IOTLB, in that order. This is required to ensure hardware references only the remapping structures referenced by the new root table pointer and not stale cached entries. For implementations reporting the Enhanced Set Root Table Pointer Support (ESRTPS) field as Set, as part of 'Set Root Table Pointer' operation, hardware performs global invalidation on all DMA remapping translation caches and hence software is not required to perform additional invalidations" We already implemented ESRTPS capability in vtd_handle_gcmd_srtp() by calling vtd_reset_caches(), just set ESRTPS in DMAR_CAP_REG to avoid unnecessary global invalidation requests of context, PASID-cache and IOTLB from guest. This change doesn't impact migration as the content of DMAR_CAP_REG is migrated too. Signed-off-by: Zhenzhong Duan Reviewed-by: Cl=C3=A9ment Mathieu--Drif --- hw/i386/intel_iommu_internal.h | 1 + hw/i386/intel_iommu.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 360e937989..5dd92d388d 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -214,6 +214,7 @@ #define VTD_CAP_DRAIN_WRITE (1ULL << 54) #define VTD_CAP_DRAIN_READ (1ULL << 55) #define VTD_CAP_FS1GP (1ULL << 56) +#define VTD_CAP_ESRTPS (1ULL << 63) #define VTD_CAP_DRAIN (VTD_CAP_DRAIN_READ | VTD_CAP_DRAIN_WR= ITE) #define VTD_CAP_CM (1ULL << 7) #define VTD_PASID_ID_SHIFT 20 diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 83c5e44413..f04300022e 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -4549,7 +4549,7 @@ static void vtd_cap_init(IntelIOMMUState *s) =20 s->cap =3D VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SLLPS | - VTD_CAP_MGAW(s->aw_bits); + VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits); if (s->dma_drain) { s->cap |=3D VTD_CAP_DRAIN; } --=20 2.47.1 From nobody Fri Nov 14 23:31:39 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1759117494; cv=none; d=zohomail.com; s=zohoarc; b=EGnoTqwciHeAtiBUhW7lvu5+F8oMegjy6m0OiQiPwk/DoHmz3w3kWc1Z3fHs2SaaKOhDgw4EJ6qWG7a8R4ib9DxTmbbC56mVsyR9MiRCdX5S8Z1qRUAiamMUx5NwAqVhpKalR+cDU14Dexj4JV+ezHn+z/hCVfOgsU3fleSMPp4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1759117494; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=nH6RrynQOVbSnYSdcCDw/FiY6U9dIbVG97eT3nI6qyM=; b=g8nsCmzm+lYPdLAwS9X30GjN1OfBQp8OLPBzKjF4vJEl+qnbkqWUoPIAd/m/160ZRL5apTO62ZVZYAEC4JTZoq8WmFwP5+EGm0ZhamszegfEVaaQu2uyyLK4+j1O0W0dxXmKJMSfMCslxFEPx9rwSetaH+grYrDj3BvvOAoNXr4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 175911749416947.048617626736586; Sun, 28 Sep 2025 20:44:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v34nD-0001Rs-Tf; Sun, 28 Sep 2025 23:43:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v34nB-0001RW-Mo for qemu-devel@nongnu.org; Sun, 28 Sep 2025 23:43:13 -0400 Received: from mgamail.intel.com ([198.175.65.15]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v34n0-0007ec-1g for qemu-devel@nongnu.org; Sun, 28 Sep 2025 23:43:13 -0400 Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2025 20:42:53 -0700 Received: from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2025 20:42:51 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1759117382; x=1790653382; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=67h9qXjiSwvEVuq3BHmAymmqQ+nXldCTegdpSnU/NhE=; b=KA1zKStLc7YvObq0Fn4OAdvCp5QNGrqXWR2mIbpK2W57my5ZPlEZY+MG hcH8rTNoksc0Ds84YKhnwb2co4aLjFwwfig+W0fVYbQzjnLT3JhBatWFO Q1/o5jaboi6v1795l0UGRwc2EREHaPgFAAA8OfT1zuPNQDFx1fsL19QEe 6dvvNI15skQNP1TdTqsZoRJ+51nUYK0AP6NaxGcIfV1Jfc5Jrfq3Ex3Rj hbbOvZva2Vgm9OEChxymxh72Q8/XXVk5zenftbTzCPHmBM+d2KZKIkLH2 z5QglupqoglSCJeZVX/lSpwjjPIZqLpTJHR4EgHndxoaPlYo9OYvFlteX w==; X-CSE-ConnectionGUID: vCq3WRowTvKsf+tGk/XyHQ== X-CSE-MsgGUID: SPXXfgyzTZ6VkzzCwhRcGQ== X-IronPort-AV: E=McAfee;i="6800,10657,11567"; a="64989297" X-IronPort-AV: E=Sophos;i="6.18,300,1751266800"; d="scan'208";a="64989297" X-CSE-ConnectionGUID: 12amySd8Rj+HlKBGuFRQBQ== X-CSE-MsgGUID: M9l4AD8BQ/uEIGNhY+fsUA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,300,1751266800"; d="scan'208";a="178865063" From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com, yi.l.liu@intel.com, clement.mathieu--drif@eviden.com, Zhenzhong Duan Subject: [PATCH v2 2/3] intel_iommu: Simplify caching mode check with VFIO device Date: Sun, 28 Sep 2025 23:42:05 -0400 Message-ID: <20250929034206.439266-3-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250929034206.439266-1-zhenzhong.duan@intel.com> References: <20250929034206.439266-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.15; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -48 X-Spam_score: -4.9 X-Spam_bar: ---- X-Spam_report: (-4.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.539, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1759117496636116600 Content-Type: text/plain; charset="utf-8" In early days, we have different tricks to ensure caching-mode=3Don with VF= IO device: 28cf553afe ("intel_iommu: Sanity check vfio-pci config on machine init done= ") c6cbc29d36 ("pc/q35: Disallow vfio-pci hotplug without VT-d caching mode") There is also a patch of same purpose but for VDPA device: b8d78277c0 ("intel-iommu: fail MAP notifier without caching mode") Because without caching mode, MAP notifier won't work correctly since guest won't send IOTLB update event when it establishes new mappings in the I/O p= age tables. Now with host IOMMU device interface between VFIO and vIOMMU, we can simpli= fy first two commits above with a small check in set_iommu_device(). This also works for future IOMMUFD backed VDPA implementation which may also need cac= hing mode on. But for legacy VDPA we still need commit b8d78277c0 as it doesn't use host IOMMU device interface. For coldplug VFIO device: qemu-system-x86_64: -device vfio-pci,host=3D0000:3b:00.0,id=3Dhostdev3,bu= s=3Droot0,iommufd=3Diommufd0: vfio 0000:3b:00.0: Failed to set vIOMMU: Devi= ce assignment is not allowed without enabling caching-mode=3Don for Intel I= OMMU. For hotplug VFIO device: if "iommu=3Doff" is configured in guest, Error: vfio 0000:3b:00.0: Failed to set vIOMMU: Device assignment is no= t allowed without enabling caching-mode=3Don for Intel IOMMU. else Error: vfio 0000:3b:00.0: memory listener initialization failed: Region= vtd-00.0-dmar: device 01.00.0 requires caching mode: Operation not support= ed The specialty for hotplug is due to the check in commit b8d78277c0 happen b= efore the check in set_iommu_device. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 40 ++++++---------------------------------- hw/i386/pc.c | 20 -------------------- 2 files changed, 6 insertions(+), 54 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index f04300022e..c634121514 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -85,13 +85,6 @@ struct vtd_iotlb_key { static void vtd_address_space_refresh_all(IntelIOMMUState *s); static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n); =20 -static void vtd_panic_require_caching_mode(void) -{ - error_report("We need to set caching-mode=3Don for intel-iommu to enab= le " - "device assignment with IOMMU protection."); - exit(1); -} - static void vtd_define_quad(IntelIOMMUState *s, hwaddr addr, uint64_t val, uint64_t wmask, uint64_t w1cmask) { @@ -4378,6 +4371,12 @@ static bool vtd_dev_set_iommu_device(PCIBus *bus, vo= id *opaque, int devfn, =20 assert(hiod); =20 + if (!s->caching_mode) { + error_setg(errp, "Device assignment is not allowed without enablin= g " + "caching-mode=3Don for Intel IOMMU."); + return false; + } + vtd_iommu_lock(s); =20 if (g_hash_table_lookup(s->vtd_host_iommu_dev, &key)) { @@ -4910,32 +4909,6 @@ static bool vtd_decide_config(IntelIOMMUState *s, Er= ror **errp) return true; } =20 -static int vtd_machine_done_notify_one(Object *child, void *unused) -{ - IntelIOMMUState *iommu =3D INTEL_IOMMU_DEVICE(x86_iommu_get_default()); - - /* - * We hard-coded here because vfio-pci is the only special case - * here. Let's be more elegant in the future when we can, but so - * far there seems to be no better way. - */ - if (object_dynamic_cast(child, "vfio-pci") && !iommu->caching_mode) { - vtd_panic_require_caching_mode(); - } - - return 0; -} - -static void vtd_machine_done_hook(Notifier *notifier, void *unused) -{ - object_child_foreach_recursive(object_get_root(), - vtd_machine_done_notify_one, NULL); -} - -static Notifier vtd_machine_done_notify =3D { - .notify =3D vtd_machine_done_hook, -}; - static void vtd_realize(DeviceState *dev, Error **errp) { MachineState *ms =3D MACHINE(qdev_get_machine()); @@ -4990,7 +4963,6 @@ static void vtd_realize(DeviceState *dev, Error **err= p) pci_setup_iommu(bus, &vtd_iommu_ops, dev); /* Pseudo address space under root PCI bus. */ x86ms->ioapic_as =3D vtd_host_dma_iommu(bus, s, Q35_PSEUDO_DEVFN_IOAPI= C); - qemu_add_machine_init_done_notifier(&vtd_machine_done_notify); } =20 static void vtd_class_init(ObjectClass *klass, const void *data) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index bc048a6d13..01cd9a67db 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1720,25 +1720,6 @@ static void pc_machine_wakeup(MachineState *machine) cpu_synchronize_all_post_reset(); } =20 -static bool pc_hotplug_allowed(MachineState *ms, DeviceState *dev, Error *= *errp) -{ - X86IOMMUState *iommu =3D x86_iommu_get_default(); - IntelIOMMUState *intel_iommu; - - if (iommu && - object_dynamic_cast((Object *)iommu, TYPE_INTEL_IOMMU_DEVICE) && - object_dynamic_cast((Object *)dev, "vfio-pci")) { - intel_iommu =3D INTEL_IOMMU_DEVICE(iommu); - if (!intel_iommu->caching_mode) { - error_setg(errp, "Device assignment is not allowed without " - "enabling caching-mode=3Don for Intel IOMMU."); - return false; - } - } - - return true; -} - static void pc_machine_class_init(ObjectClass *oc, const void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -1758,7 +1739,6 @@ static void pc_machine_class_init(ObjectClass *oc, co= nst void *data) x86mc->apic_xrupt_override =3D true; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler =3D pc_get_hotplug_handler; - mc->hotplug_allowed =3D pc_hotplug_allowed; mc->auto_enable_numa_with_memhp =3D true; mc->auto_enable_numa_with_memdev =3D true; mc->has_hotpluggable_cpus =3D true; --=20 2.47.1 From nobody Fri Nov 14 23:31:40 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1759117494; cv=none; d=zohomail.com; s=zohoarc; b=VyaKOMGv+pqsCjCz0o4pJuywK1/jG/xuUef1SXMhB08V/0NTxxdYYU3Mk34mXP2KxL4Ftpuql4E78O6rNkGUZt6tY4+IRZJf0WuBHMwfBHvKjC/sc02pnKZIY8cwDJwmhT+ble3+cSoBVv4h06cpLzhWv9ncMxNEzALvPWP3CgA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1759117494; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=VzfEEsSwh9KKeFwHYlttkW11Nf2qNRA78+WGj7ycwDs=; b=mCqAlpEnEaldSnmdE8sQnw30khDZrcCtHuTngvjg0Ij77OzY419mi3mM4K28W5lZGnfWHs90rUMmBUvJMTVHg6ys5nQKr+n/WpN2h7JxUt6JOrcyAfxRMiDMQLC9ZCb0e6xjbrYPxDhE0/0Jtbw6pcar4U3IvbfAXuMM16NCu0I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1759117494255557.5280643903404; Sun, 28 Sep 2025 20:44:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v34nX-0001XE-C5; Sun, 28 Sep 2025 23:43:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v34nT-0001Wq-CO for qemu-devel@nongnu.org; Sun, 28 Sep 2025 23:43:31 -0400 Received: from mgamail.intel.com ([198.175.65.15]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v34nB-0007dc-05 for qemu-devel@nongnu.org; Sun, 28 Sep 2025 23:43:29 -0400 Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2025 20:42:55 -0700 Received: from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2025 20:42:53 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1759117393; x=1790653393; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EG8msmH7phOa7M5JXnVMbYp5jPcD7mOflbwaeYFqvrk=; b=n3qsgkQhT+U755hJoFqfOwLQCXXiegmBeAVw3qmcIvAgEZXw7czDPZYP brptQpdkerBmUtTgA/nXuv3HlvnAvSBIdCaTzUR2OOTrnQhVcHdPiNV5t xz2d0D52Ka990ntiyYwRn5RPlZBw0QqKeY74YUSwsPGr+21/V5Imdj3yb RvQBnUXpfx0xNBA7XD6TIQvRMqCRRrYzj1n7AiKgRoRCmIhxihkvkQXNK RnJgoirvVbgFzlZJ5UtUI3xM5PQbVXgz0Z9DCNk4XvLTTtHQ0KMbdOAtV 28lIZB9OmfIQ1ogp268w7xQid4bC1QLgZj/HwmM99gkr/6VuDEob+3jHD Q==; X-CSE-ConnectionGUID: pzFn16nmTcSg3D6MCeVBjg== X-CSE-MsgGUID: 5Wew7m9WSoqfEgeN+8vYcw== X-IronPort-AV: E=McAfee;i="6800,10657,11567"; a="64989301" X-IronPort-AV: E=Sophos;i="6.18,300,1751266800"; d="scan'208";a="64989301" X-CSE-ConnectionGUID: M1pJv+n8Rxq4GyhlJguxEA== X-CSE-MsgGUID: qLv4dmIhQ4O96iNMu1ykAg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,300,1751266800"; d="scan'208";a="178865073" From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com, yi.l.liu@intel.com, clement.mathieu--drif@eviden.com, Zhenzhong Duan Subject: [PATCH v2 3/3] pci: Fix wrong parameter passing to pci_device_get_iommu_bus_devfn() Date: Sun, 28 Sep 2025 23:42:06 -0400 Message-ID: <20250929034206.439266-4-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250929034206.439266-1-zhenzhong.duan@intel.com> References: <20250929034206.439266-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.15; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1759117496503116600 Content-Type: text/plain; charset="utf-8" The 2nd parameter of pci_device_get_iommu_bus_devfn() about root PCIBus backed by an IOMMU for the PCI device, the 3rd is about aliased PCIBus of the PCI device. Meanwhile the 3rd and 4th parameters are optional, pass NULL if they are not needed. Signed-off-by: Zhenzhong Duan Reviewed-by: Cl=C3=A9ment Mathieu--Drif --- hw/pci/pci.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index c3df9d6656..d5ed89aab7 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2967,7 +2967,7 @@ int pci_iommu_init_iotlb_notifier(PCIDevice *dev, IOM= MUNotifier *n, PCIBus *iommu_bus; int devfn; =20 - pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn); + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); if (iommu_bus && iommu_bus->iommu_ops->init_iotlb_notifier) { iommu_bus->iommu_ops->init_iotlb_notifier(bus, iommu_bus->iommu_op= aque, devfn, n, fn, opaque); @@ -3025,7 +3025,7 @@ int pci_pri_request_page(PCIDevice *dev, uint32_t pas= id, bool priv_req, return -EPERM; } =20 - pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn); + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); if (iommu_bus && iommu_bus->iommu_ops->pri_request_page) { return iommu_bus->iommu_ops->pri_request_page(bus, iommu_bus->iommu_opaq= ue, @@ -3049,7 +3049,7 @@ int pci_pri_register_notifier(PCIDevice *dev, uint32_= t pasid, return -EPERM; } =20 - pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn); + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); if (iommu_bus && iommu_bus->iommu_ops->pri_register_notifier) { iommu_bus->iommu_ops->pri_register_notifier(bus, iommu_bus->iommu_opaqu= e, @@ -3066,7 +3066,7 @@ void pci_pri_unregister_notifier(PCIDevice *dev, uint= 32_t pasid) PCIBus *iommu_bus; int devfn; =20 - pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn); + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); if (iommu_bus && iommu_bus->iommu_ops->pri_unregister_notifier) { iommu_bus->iommu_ops->pri_unregister_notifier(bus, iommu_bus->iommu_opa= que, @@ -3098,7 +3098,7 @@ ssize_t pci_ats_request_translation(PCIDevice *dev, u= int32_t pasid, return -EPERM; } =20 - pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn); + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); if (iommu_bus && iommu_bus->iommu_ops->ats_request_translation) { return iommu_bus->iommu_ops->ats_request_translation(bus, iommu_bus->iommu_opaq= ue, @@ -3122,7 +3122,7 @@ int pci_iommu_register_iotlb_notifier(PCIDevice *dev,= uint32_t pasid, return -EPERM; } =20 - pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn); + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); if (iommu_bus && iommu_bus->iommu_ops->register_iotlb_notifier) { iommu_bus->iommu_ops->register_iotlb_notifier(bus, iommu_bus->iommu_opaque, devfn, @@ -3144,7 +3144,7 @@ int pci_iommu_unregister_iotlb_notifier(PCIDevice *de= v, uint32_t pasid, return -EPERM; } =20 - pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn); + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); if (iommu_bus && iommu_bus->iommu_ops->unregister_iotlb_notifier) { iommu_bus->iommu_ops->unregister_iotlb_notifier(bus, iommu_bus->iommu_o= paque, @@ -3158,11 +3158,9 @@ int pci_iommu_unregister_iotlb_notifier(PCIDevice *d= ev, uint32_t pasid, int pci_iommu_get_iotlb_info(PCIDevice *dev, uint8_t *addr_width, uint32_t *min_page_size) { - PCIBus *bus; PCIBus *iommu_bus; - int devfn; =20 - pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn); + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, NULL, NULL); if (iommu_bus && iommu_bus->iommu_ops->get_iotlb_info) { iommu_bus->iommu_ops->get_iotlb_info(iommu_bus->iommu_opaque, addr_width, min_page_size); --=20 2.47.1