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Iglesias" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , "Frederic Konrad" , Sai Pavan Boddu Subject: [PATCH v6 34/47] hw/arm/xlnx-versal: use hw/arm/bsa.h for timer IRQ indices Date: Fri, 26 Sep 2025 09:07:52 +0200 Message-ID: <20250926070806.292065-35-luc.michel@amd.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250926070806.292065-1-luc.michel@amd.com> References: <20250926070806.292065-1-luc.michel@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA4F:EE_|DM4PR12MB6064:EE_ X-MS-Office365-Filtering-Correlation-Id: 1982bcbc-eea8-4326-9200-08ddfccba109 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?TWxFOUo5NWtDVUNoWm1qTHB1QUgyaGkzWnpHWGQ1UzY2UGU5ejQ4OTdJWXp3?= =?utf-8?B?c1lhc0JNTkI4c21tckUyU0tRQUNQaEVUT2RKNnRHRC9FRXg3a1pEQkRwQXFv?= =?utf-8?B?Z1ZmdWZDeUd4Y2cxQWp2S1QzWGx5MmRhdlBFUklSbU5mVWJtekJtQ1ptY2FW?= =?utf-8?B?V1plM2JNa3hYZGkybGNQdFNuTDNmL01lbVh0dXRRcDlvMmZkNVpyVXpxTldX?= =?utf-8?B?aEZuQUxUclgzclZISlczbkJCR2x4U1R5N1RWUzNKMW5VbDVsdXQzQnFJNEZV?= =?utf-8?B?ZzJWM3pJQ3N3Tm9Da0lKWVFES3F1Tld3NXhKNC9aNUw2SXNvTld0bnNNbjh2?= =?utf-8?B?dlFVRUFBaHl1WGdBbnAxU25XOHBhV3p3ZDIwdkxndGJrMDBiaWZzaDFBTmNh?= =?utf-8?B?K0VsY1A1TVBVdVQ0Wm9idE1Ba3RSZzBwQmNyZnVkc0NRL3JwbktRQkREN1NQ?= =?utf-8?B?VHJOWmRZSEI2RmZoYmt6MnFaZFBiejJXeGRKTS9iRGZCYmVpU2xmT3lJT0Jo?= =?utf-8?B?ZWtsZ3ZwT09nVjJyQjN1UFIrRUpsN3k1ODQ2YWh4WFFYTk9SYnpEL3RsS0Vy?= =?utf-8?B?K0xTb3Fja25HT3dHQk5HWjA5bW9VZ3R2NXRnanRsV3BoTldmZWlBd2l6VEhD?= =?utf-8?B?OUlFRnpPQXJpMWdSampKOWlsb041YklaM1YweVoxZ3EzWmRuN3JGeWNtMDNm?= =?utf-8?B?VEtuTVMzUjhSZG1zNHA5UllUUG0wMlJHckZjZnc2MlMxbkEydTZZSDgrQVJX?= =?utf-8?B?MmgwbWRzQXV0Q3dlQWFiaDN3Y0Q4Y3J5K2VJUWZlbEZzRHp0U3RZU1NYb2dq?= =?utf-8?B?OUwrQyt6Qm9aUGJSVXY3SDZqWEZOY1hUcStUTGo3TVRWOHJoRnZ4VVVuOFRZ?= =?utf-8?B?eWRqdTZUS0tKL1NJWUxlUW9qRmFuV0FOYVFqOXZRUlluMk84L1FTOWRpSmh4?= =?utf-8?B?OUw0c2NtenhwbGc0WjhZaU0zN3AxWU16Ui84cjFiUmZXeW1kWHA5QlF4Rkl4?= =?utf-8?B?cEttY1UySTg1M1F4UHpiWnF4NE0yWFhWbHozQ0daSGw0VWJUYjloMG95L1dM?= =?utf-8?B?d1Nyb2s3cG9OOHZnQVM0d1piMzJHWmFGTmZWTFovaU90VkpZMHlGSDJqVlBS?= =?utf-8?B?WFd1bU5YMDV2bGhmdWQ5KzRNZmFkZUhWdFN4SUJ3cmc4cVljMFIvYkVMSkNo?= =?utf-8?B?UDJoMVJRUVBjMnNDeXZHaXh0RU5GVFJ0UllGOEtDdTZjUWdxTTlXeUNyV3pT?= =?utf-8?B?R0pRZ0czWnlBRHIyTG10Rm9EWCtPaE9ua2liTGtwR0VubHhTYW8rTXVSUThW?= =?utf-8?B?QXJwMi9wRVZWUTNQZndiRVhZdnAySmV0MUVJdndDTmV3UEM3bzlkNXdtVlN6?= =?utf-8?B?b1plT21JQnFKOG5HOUNEMFk0ckxBbXI2NXBXRHpuN2NzSmNnSGR0blVWK09X?= =?utf-8?B?alRhK2Y0TnBIdld6ZVh0RnIzbkFzcmpGcHBHWlJFa1JlSGtBN2tCaHdoQmpV?= =?utf-8?B?Yjl4THdpV0dHSThxbVk1YkRnWE5NMlZMek5iTGY5VitxcytoMXVTR3lheU5k?= =?utf-8?B?bDkrZ0t3bEJ4RGIweG15QUFoUUw4OUtZM0NZOWQzRVIwYW1TN3Bxbm0vSUZY?= =?utf-8?B?RFVrMllWb3JzS0VqNS9nRXowY2t6WHB6dWx2STFYMERUT0RKSUJXeVJjUHhn?= =?utf-8?B?cE44TjZKTFJxVDhKWEhQREF5cHFVeHFObTUwdFMyWVc1WnQrdWxzRHJicnVV?= =?utf-8?B?MFJhSGd4QnU3K05OVUUwdm1KbHl3Z29VcVo2TThvYXB3eDViZXVFMllPRVpy?= =?utf-8?B?TGRKZzluaDZIbEFUdExRYW1UZmtvTnN5bThQdnZaSkpoTnhOSFQ1VmY2QW85?= =?utf-8?B?TmtUUXo4eFAyTmU4WENYMFlYV0c5c1kvQ1B1VFJjU3ExU3pzL0lNMGc1Zmtq?= =?utf-8?B?Si9nT1hWUUNrckhvRWtKMlJaZVBWK2k2NXEyMVNBOUlIQjhqZnlyWGlnbHE2?= =?utf-8?B?UlFwS2Q3Q0kwOHZwbG5IazJlNWNmK2ppWnhRTktNYUNQRVlYWHVTYTg5c2FJ?= =?utf-8?B?QTFPTVFhTzkxSU51Vm9rMmlnMmJGYzlHbm81Zi9tTERUVE9scEtrZE5XYnlL?= =?utf-8?Q?6/AM=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Signed-off-by: Luc Michel Reviewed-by: Francisco Iglesias Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Edgar E. Iglesias --- include/hw/arm/xlnx-versal.h | 6 ------ hw/arm/xlnx-versal.c | 28 +++++++++++++++++----------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 7bdf6dab629..da0260b83de 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -85,16 +85,10 @@ int versal_get_num_can(VersalVersion version); int versal_get_num_sdhci(VersalVersion version); =20 /* Memory-map and IRQ definitions. Copied a subset from * auto-generated files. */ =20 -#define VERSAL_GIC_MAINT_IRQ 9 -#define VERSAL_TIMER_VIRT_IRQ 11 -#define VERSAL_TIMER_S_EL1_IRQ 13 -#define VERSAL_TIMER_NS_EL1_IRQ 14 -#define VERSAL_TIMER_NS_EL2_IRQ 10 - #define VERSAL_CRL_IRQ 10 #define VERSAL_UART0_IRQ_0 18 #define VERSAL_UART1_IRQ_0 19 #define VERSAL_CANFD0_IRQ_0 20 #define VERSAL_CANFD1_IRQ_0 21 diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 6604e24a9cd..dc388300185 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -47,10 +47,11 @@ #include "hw/intc/arm_gicv3_its_common.h" #include "hw/intc/arm_gic.h" #include "hw/core/split-irq.h" #include "target/arm/cpu.h" #include "hw/cpu/cluster.h" +#include "hw/arm/bsa.h" =20 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") #define GEM_REVISION 0x40070106 =20 @@ -671,11 +672,12 @@ static DeviceState *versal_create_gic(Versal *s, } =20 qemu_fdt_setprop_cell(s->cfg.fdt, node, "phandle", s->phandle.gic); qemu_fdt_setprop_cell(s->cfg.fdt, node, "#interrupt-cells", 3); qemu_fdt_setprop_cells(s->cfg.fdt, node, "interrupts", - GIC_FDT_IRQ_TYPE_PPI, VERSAL_GIC_MAINT_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_GIC_MAINT_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI); qemu_fdt_setprop(s->cfg.fdt, node, "interrupt-controller", NULL, 0= ); } =20 versal_create_gic_its(s, map, dev, mr, node); @@ -696,14 +698,14 @@ static void connect_gic_to_cpu(const VersalCpuCluster= Map *map, /* * Mapping from the output timer irq lines from the CPU to the * GIC PPI inputs. */ const int timer_irq[] =3D { - [GTIMER_PHYS] =3D VERSAL_TIMER_NS_EL1_IRQ, - [GTIMER_VIRT] =3D VERSAL_TIMER_VIRT_IRQ, - [GTIMER_HYP] =3D VERSAL_TIMER_NS_EL2_IRQ, - [GTIMER_SEC] =3D VERSAL_TIMER_S_EL1_IRQ, + [GTIMER_PHYS] =3D INTID_TO_PPI(ARCH_TIMER_NS_EL1_IRQ), + [GTIMER_VIRT] =3D INTID_TO_PPI(ARCH_TIMER_VIRT_IRQ), + [GTIMER_HYP] =3D INTID_TO_PPI(ARCH_TIMER_NS_EL2_IRQ), + [GTIMER_SEC] =3D INTID_TO_PPI(ARCH_TIMER_S_EL1_IRQ), }; =20 has_gtimer =3D arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_GENERIC_TIM= ER); =20 if (has_gtimer) { @@ -714,13 +716,13 @@ static void connect_gic_to_cpu(const VersalCpuCluster= Map *map, } } =20 if (map->gic.version =3D=3D 3) { qemu_irq maint_irq; + int maint_idx =3D ppibase + INTID_TO_PPI(ARCH_GIC_MAINT_IRQ); =20 - maint_irq =3D qdev_get_gpio_in(gic, - ppibase + VERSAL_GIC_MAINT_IRQ); + maint_irq =3D qdev_get_gpio_in(gic, maint_idx); qdev_connect_gpio_out_named(cpu, "gicv3-maintenance-interrupt", 0, maint_irq); } =20 sysbus_connect_irq(sbd, idx, qdev_get_gpio_in(cpu, ARM_CPU_IRQ)); @@ -840,17 +842,21 @@ static void versal_create_cpu_cluster(Versal *s, cons= t VersalCpuClusterMap *map) =20 has_gtimer =3D arm_feature(&ARM_CPU(cpus[0])->env, ARM_FEATURE_GENERIC= _TIMER); if (map->dtb_expose && has_gtimer) { qemu_fdt_add_subnode(s->cfg.fdt, "/timer"); qemu_fdt_setprop_cells(s->cfg.fdt, "/timer", "interrupts", - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_S_EL1_IR= Q, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_S_EL1_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL1_I= RQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_NS_EL1_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_VIRT_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_VIRT_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL2_I= RQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_NS_EL2_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI); qemu_fdt_setprop(s->cfg.fdt, "/timer", "compatible", compatible, sizeof(compatible)); } } --=20 2.51.0