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([71.212.157.132]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33439103461sm63221a91.8.2025.09.24.12.01.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Sep 2025 12:01:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1758740487; x=1759345287; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cyCevuOZBxjdSdzWhJH69VXeS030D/A2jQgzyM1Qqts=; b=UYiTbnrDNRSdIfhRWsbr4CkQbJenqgFs/coVDeWMVue69tNIDGNZPwTFg0GErEoFUd 3/XI1qv8H8OYjaVVbcTGGo3VLo0x1aJMla07SZEWXJaT32ZdNmxtGrsXvVyVgaz2JvyT 58yigGcmbydHcpNTlguIAzdpqg+zGr+NgQByX6GxUNXqHYRvkogW8a3lizkL+gsiombw ff8QgMu8Z1u9vlSoH2drCkqIYpFBTXeqPzSwqTZiNXQl5rQOJIbYCzORkShj+40GS58g WmJQVp7j8zTKVEHoLCnrR+G5AH4+W6DONNwcVmWTXROmKhDRW4ipm+vF/qaFRdHuASIS kM0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758740487; x=1759345287; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cyCevuOZBxjdSdzWhJH69VXeS030D/A2jQgzyM1Qqts=; b=wM406omQhDy0zSGjuuX3X8Xc846gy5ScR2yweDbfAGhQFyzuEm2470I4x0ufs9dyVM G3oOG1/Zm9DDanZCjyZruUcUmyNjg8Fl7dM7bL9e2lqK9A+c8jFh6Kk3lQOskC4u/Ph6 gzQvx4+IsiekWevuaYZg/Ltt8d/aw1Nk4d0WnW+w6jLvlu2B52F/XfPy/Z2sywBi1PFR 19C8qKrnWXJEvx3lmcp0qtvD2i7kZuwSsLpAzWZIEttPZPcPEh9GonViRFv+SfOR6s5x duQo3n626KaA9WaVLGWH1l44AJRRS0mN63imP8OyNKzykSLRQE/ocSTN0Z4pMqjycw7y Yx0g== X-Gm-Message-State: AOJu0YyxY7DIXh219F/wYnstdtcRSzIt98gYbunWgxv1hw9LiEsQONqc 7M6J5aw58S9JfVabhye/lcD6VHN+n+8nDwiBkUj5X5V/bZYfMMrt8QRCoF/lzwd5Fkm6bZVemP1 vIp/h X-Gm-Gg: ASbGncvG3iK5MUPXaiQG13vATjS14bSxuJ5sdVbrootuujIFgXO2WNlHBHVcKbDzIEn DgegX0RsgsIE0G3rQnvet+Y9Z/RzLIr3q0J6Bk4RWj6Pk8XkkOLfIBRGFJj1Tnr7mVFgwWGLnL9 1Ewv3OUZoh4EzX2iys/Hbl6GskG6SzYSttBP95R+ksCZLeQFZMWs9a1MaRhPJI6LBkq3OUIbZ5V gmUzw04nIJJDe6JnaKsQinAMHPghSHbZQZ0oD8cRFs8MeXEGVD3mJfsU+1vYu/S9sSrAEz5QVt4 +1jY2Eunoge6szc0bgVTcehrgUkCL7wzgAYIxyt9yxTeTQVM1dX3VDzlO0nm17hQZkKgGmQQxfg wElnqCEWKDGmgVlCajBtAXBMVyaM5 X-Google-Smtp-Source: AGHT+IEAJ+Bs5OtTMywz0Iu1RjGvy61lYf/y2xYuvxLD5C83uyJlMbBQEvAt0kF6lJY0NjwHw6/n5Q== X-Received: by 2002:a17:90b:2684:b0:32b:94a2:b0d5 with SMTP id 98e67ed59e1d1-3342a318acbmr789061a91.37.1758740486957; Wed, 24 Sep 2025 12:01:26 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PULL 26/32] accel/tcg: Move post-load tb_flush to vm_change_state hook Date: Wed, 24 Sep 2025 12:00:59 -0700 Message-ID: <20250924190106.7089-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250924190106.7089-1-richard.henderson@linaro.org> References: <20250924190106.7089-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1758741252809116600 We need not call tb_flush once per cpu, only once per vmload. By moving the call from cpu_common_post_load to a tcg-specific vm_change_state_handler, we do even better than that: we only flush when called from HMP triggered loadvm, when we had old state to flush. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- accel/tcg/tcg-all.c | 21 +++++++++++++++++++++ hw/core/cpu-system.c | 9 --------- 2 files changed, 21 insertions(+), 9 deletions(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 5125e1a4e2..18ea0c58b0 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -38,6 +38,8 @@ #include "qemu/target-info.h" #ifndef CONFIG_USER_ONLY #include "hw/boards.h" +#include "exec/tb-flush.h" +#include "system/runstate.h" #endif #include "accel/accel-ops.h" #include "accel/accel-cpu-ops.h" @@ -82,6 +84,23 @@ static void tcg_accel_instance_init(Object *obj) =20 bool one_insn_per_tb; =20 +#ifndef CONFIG_USER_ONLY +static void tcg_vm_change_state(void *opaque, bool running, RunState state) +{ + if (state =3D=3D RUN_STATE_RESTORE_VM) { + /* + * loadvm will update the content of RAM, bypassing the usual + * mechanisms that ensure we flush TBs for writes to memory + * we've translated code from, so we must flush all TBs. + * + * vm_stop() has just stopped all cpus, so we are exclusive. + */ + assert(!running); + tb_flush__exclusive_or_serial(); + } +} +#endif + static int tcg_init_machine(AccelState *as, MachineState *ms) { TCGState *s =3D TCG_STATE(as); @@ -124,6 +143,8 @@ static int tcg_init_machine(AccelState *as, MachineStat= e *ms) default: g_assert_not_reached(); } + + qemu_add_vm_change_state_handler(tcg_vm_change_state, NULL); #endif =20 tcg_allowed =3D true; diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 09c928c1f9..f601a083d1 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -23,7 +23,6 @@ #include "system/address-spaces.h" #include "exec/cputlb.h" #include "system/memory.h" -#include "exec/tb-flush.h" #include "qemu/target-info.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" @@ -207,14 +206,6 @@ static int cpu_common_post_load(void *opaque, int vers= ion_id) cpu_reset_interrupt(cpu, 0x01); =20 tlb_flush(cpu); - - /* - * loadvm has just updated the content of RAM, bypassing the - * usual mechanisms that ensure we flush TBs for writes to - * memory we've translated code from. So we must flush all TBs, - * which will now be stale. - */ - tb_flush(cpu); } =20 return 0; --=20 2.43.0