From nobody Sun Sep 28 16:34:26 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1758698635; cv=none; d=zohomail.com; s=zohoarc; b=RRxQ1A4tIJ9DrPX+KtdBGkDngyuvW6V867f73uV65hEtTaCxGmRWXyWsZcQljCrAVlC/zDi6pJs+5hMmapHSqOTDI6XZCS6KGRLPgHdrKen3RcPiJ8JPF5cRlYPl/TQmnjYXUVfJpFakT6NCKcY9w2u7RGhwuao6PAeRf7t6y4I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1758698635; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=xnZkf8T3aYXEsrxPDI2eMRXW35Q/mALOg3UnwThFjFw=; b=CneRgwnUCmTFWTbg/8MQYyssb6cvkVjECXIanUvNKk9dAfeN/lwtNQSN71BhgfVZppf/WPEFsQJ2p3bVbScwrI+ZHB3EPvTvAm/P5A+J0SNniRQaRDQZAfgcxT5lKr0paZkrhdWLq4loUTqDNvn2NgWdJVxn1S5b9Olq40hfqFA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1758698635384834.9963825087844; Wed, 24 Sep 2025 00:23:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v1JnO-0005be-1g; Wed, 24 Sep 2025 03:20:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1JnL-0005a3-EV for qemu-devel@nongnu.org; Wed, 24 Sep 2025 03:20:07 -0400 Received: from rev.ng ([94.130.142.21]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1JnB-0003QK-At for qemu-devel@nongnu.org; Wed, 24 Sep 2025 03:20:06 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=rev.ng; s=dkim; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive:List-Unsubscribe:List-Unsubscribe-Post: List-Help; bh=xnZkf8T3aYXEsrxPDI2eMRXW35Q/mALOg3UnwThFjFw=; b=ZIZTFiOGAcDG3+n Owd3aOU8x6gqj/zmefIz8lTmOFZU8VmNT/DU1a+Uh3H5Ywc3YrFoTnePEueLSK/xWE/6rc8WPTkmX O3wtZUm8ZL8nd76SCbhs7+yWJpPQ3qyPIejKthuNUL1qddg0nCxWtA9vP4g/nSUx+Nv9hu2+qHsPJ B8=; To: qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org, philmd@linaro.org, alistair.francis@wdc.com, palmer@dabbelt.com Subject: [RFC PATCH 14/34] target/riscv: Fix size of badaddr and bins Date: Wed, 24 Sep 2025 09:21:04 +0200 Message-ID: <20250924072124.6493-15-anjo@rev.ng> In-Reply-To: <20250924072124.6493-1-anjo@rev.ng> References: <20250924072124.6493-1-anjo@rev.ng> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=94.130.142.21; envelope-from=anjo@rev.ng; helo=rev.ng X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Anton Johansson From: Anton Johansson via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1758698636600116600 Content-Type: text/plain; charset="utf-8" Fix these fields to 64 bits as they cannot be made smaller. Also make sure stores to these fields from TCG are 64 bits in size to avoid incorrect values on big endian hosts. Signed-off-by: Anton Johansson --- target/riscv/cpu.h | 4 ++-- target/riscv/machine.c | 2 +- target/riscv/translate.c | 6 ++++-- target/riscv/insn_trans/trans_privileged.c.inc | 2 +- 4 files changed, 8 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index cf10662b3a..343cc6bab7 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -233,8 +233,8 @@ struct CPUArchState { uint8_t frm; float_status fp_status; =20 - target_ulong badaddr; - target_ulong bins; + uint64_t badaddr; + uint64_t bins; =20 target_ulong guest_phys_fault_addr; =20 diff --git a/target/riscv/machine.c b/target/riscv/machine.c index d38243b278..a1cd67de99 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -412,7 +412,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { VMSTATE_UINT64(env.load_res, RISCVCPU), VMSTATE_UINT64(env.load_val, RISCVCPU), VMSTATE_UINT8(env.frm, RISCVCPU), - VMSTATE_UINTTL(env.badaddr, RISCVCPU), + VMSTATE_UINT64(env.badaddr, RISCVCPU), VMSTATE_UINTTL(env.guest_phys_fault_addr, RISCVCPU), VMSTATE_UINTTL(env.priv_ver, RISCVCPU), VMSTATE_UINTTL(env.vext_ver, RISCVCPU), diff --git a/target/riscv/translate.c b/target/riscv/translate.c index b856792d3b..339ef91f6b 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -252,7 +252,7 @@ static void generate_exception(DisasContext *ctx, RISCV= Exception excp) =20 static void gen_exception_illegal(DisasContext *ctx) { - tcg_gen_st_i32(tcg_constant_i32(ctx->opcode), tcg_env, + tcg_gen_st_i64(tcg_constant_i64(ctx->opcode), tcg_env, offsetof(CPURISCVState, bins)); if (ctx->virt_inst_excp) { generate_exception(ctx, RISCV_EXCP_VIRT_INSTRUCTION_FAULT); @@ -263,7 +263,9 @@ static void gen_exception_illegal(DisasContext *ctx) =20 static void gen_exception_inst_addr_mis(DisasContext *ctx, TCGv target) { - tcg_gen_st_tl(target, tcg_env, offsetof(CPURISCVState, badaddr)); + TCGv_i64 ext =3D tcg_temp_new_i64(); + tcg_gen_extu_tl_i64(ext, target); + tcg_gen_st_i64(ext, tcg_env, offsetof(CPURISCVState, badaddr)); generate_exception(ctx, RISCV_EXCP_INST_ADDR_MIS); } =20 diff --git a/target/riscv/insn_trans/trans_privileged.c.inc b/target/riscv/= insn_trans/trans_privileged.c.inc index 8a62b4cfcd..a8eaccef67 100644 --- a/target/riscv/insn_trans/trans_privileged.c.inc +++ b/target/riscv/insn_trans/trans_privileged.c.inc @@ -68,7 +68,7 @@ static bool trans_ebreak(DisasContext *ctx, arg_ebreak *a) if (pre =3D=3D 0x01f01013 && ebreak =3D=3D 0x00100073 && post =3D=3D 0= x40705013) { generate_exception(ctx, RISCV_EXCP_SEMIHOST); } else { - tcg_gen_st_tl(tcg_constant_tl(ebreak_addr), tcg_env, + tcg_gen_st_i64(tcg_constant_i64(ebreak_addr), tcg_env, offsetof(CPURISCVState, badaddr)); generate_exception(ctx, RISCV_EXCP_BREAKPOINT); } --=20 2.51.0