From nobody Sun Sep 28 17:03:18 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1758693472; cv=none; d=zohomail.com; s=zohoarc; b=c8VUM8caxKgblbYaMOfSAemV6V0F0D4STWp7AP/jukMH2dJLFzKLqk++mDee3B9kGwmRZTCMtaWDMTHonmLC3MqCbuwOckeNNJ4AMVLJUQRqRZo4ZqWsw3uwpI99VKgIaMA3Q26VN43wgu8t7mwotrURuS/Tfy76bruyUmBXFVs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1758693472; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=7tqhd20YO879ZbkD6BM7HQOnS/oM/eAQzAmM0mPfBp0=; b=kyUQGcrs+MSbPZOB3TOAOW2BcUPo/9KzfIFD8fAWwSh36AqbfL1AXhQINp7VbfGKZL3PttZEsGAlP0u6VYAo5KstCxGFBneU4xhdni6Q5h50v/4H2JxkkgI+9fJjeCbZKw8UbVwXck8dT1WFjM7JXHiJ2hj+4SZTJ9UgAkQv+JY= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1758693472699991.7856798152951; Tue, 23 Sep 2025 22:57:52 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v1IUq-00042v-0l; Wed, 24 Sep 2025 01:56:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUh-0003gZ-3c; Wed, 24 Sep 2025 01:56:52 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUc-0000It-48; Wed, 24 Sep 2025 01:56:45 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 24 Sep 2025 13:56:04 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 24 Sep 2025 13:56:04 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 5/7] hw/arm/aspeed_ast27x0-fc: Replace error_abort with local errp Date: Wed, 24 Sep 2025 13:55:59 +0800 Message-ID: <20250924055602.294857-6-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250924055602.294857-1-jamin_lin@aspeedtech.com> References: <20250924055602.294857-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758693474248116600 Content-Type: text/plain; charset="utf-8" This patch introduces a local Error **errp =3D NULL and replaces error_abort with errp in these paths. This makes error handling more consistent with QEMU guidelines and avoids using error_abort in cases where failure should not be treated as a programming error. Discussion: object_property_set_link() can return false only when it fails, and it sets an error when it fails. Since passing &error_abort causes an abort, the function never returns false, and the return statement is effectively dead code. If failure is considered a programming error, using &error_abort is correct. However, if failure is not a programming error, passing &error_abort is wrong, and errp should be used instead. This patch follows the latter approach by replacing error_abort with errp. https://patchwork.kernel.org/project/qemu-devel/patch/20250717034054.190399= 1-3-jamin_lin@aspeedtech.com/#26540626 Signed-off-by: Jamin Lin --- hw/arm/aspeed_ast27x0-fc.c | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c index 7087be4288..b15cb94c39 100644 --- a/hw/arm/aspeed_ast27x0-fc.c +++ b/hw/arm/aspeed_ast27x0-fc.c @@ -61,6 +61,7 @@ static void ast2700fc_ca35_init(MachineState *machine) Ast2700FCState *s =3D AST2700A1FC(machine); AspeedSoCState *soc; AspeedSoCClass *sc; + Error **errp =3D NULL; =20 object_initialize_child(OBJECT(s), "ca35", &s->ca35, "ast2700-a1"); soc =3D ASPEED_SOC(&s->ca35); @@ -71,20 +72,20 @@ static void ast2700fc_ca35_init(MachineState *machine) memory_region_add_subregion(get_system_memory(), 0, &s->ca35_memory); =20 if (!memory_region_init_ram(&s->ca35_dram, OBJECT(&s->ca35), "ca35-dra= m", - AST2700FC_BMC_RAM_SIZE, &error_abort)) { + AST2700FC_BMC_RAM_SIZE, errp)) { return; } if (!object_property_set_link(OBJECT(&s->ca35), "memory", OBJECT(&s->ca35_memory), - &error_abort)) { + errp)) { return; }; if (!object_property_set_link(OBJECT(&s->ca35), "dram", - OBJECT(&s->ca35_dram), &error_abort)) { + OBJECT(&s->ca35_dram), errp)) { return; } if (!object_property_set_int(OBJECT(&s->ca35), "ram-size", - AST2700FC_BMC_RAM_SIZE, &error_abort)) { + AST2700FC_BMC_RAM_SIZE, errp)) { return; } =20 @@ -95,15 +96,15 @@ static void ast2700fc_ca35_init(MachineState *machine) } } if (!object_property_set_int(OBJECT(&s->ca35), "hw-strap1", - AST2700FC_HW_STRAP1, &error_abort)) { + AST2700FC_HW_STRAP1, errp)) { return; } if (!object_property_set_int(OBJECT(&s->ca35), "hw-strap2", - AST2700FC_HW_STRAP2, &error_abort)) { + AST2700FC_HW_STRAP2, errp)) { return; } aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART12, serial_hd(0)); - if (!qdev_realize(DEVICE(&s->ca35), NULL, &error_abort)) { + if (!qdev_realize(DEVICE(&s->ca35), NULL, errp)) { return; } =20 @@ -125,6 +126,8 @@ static void ast2700fc_ssp_init(MachineState *machine) { AspeedSoCState *soc; Ast2700FCState *s =3D AST2700A1FC(machine); + Error **errp =3D NULL; + s->ssp_sysclk =3D clock_new(OBJECT(s), "SSP_SYSCLK"); clock_set_hz(s->ssp_sysclk, 200000000ULL); =20 @@ -134,13 +137,13 @@ static void ast2700fc_ssp_init(MachineState *machine) =20 qdev_connect_clock_in(DEVICE(&s->ssp), "sysclk", s->ssp_sysclk); if (!object_property_set_link(OBJECT(&s->ssp), "memory", - OBJECT(&s->ssp_memory), &error_abort)) { + OBJECT(&s->ssp_memory), errp)) { return; } =20 soc =3D ASPEED_SOC(&s->ssp); aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART4, serial_hd(1)); - if (!qdev_realize(DEVICE(&s->ssp), NULL, &error_abort)) { + if (!qdev_realize(DEVICE(&s->ssp), NULL, errp)) { return; } } @@ -149,6 +152,8 @@ static void ast2700fc_tsp_init(MachineState *machine) { AspeedSoCState *soc; Ast2700FCState *s =3D AST2700A1FC(machine); + Error **errp =3D NULL; + s->tsp_sysclk =3D clock_new(OBJECT(s), "TSP_SYSCLK"); clock_set_hz(s->tsp_sysclk, 200000000ULL); =20 @@ -158,13 +163,13 @@ static void ast2700fc_tsp_init(MachineState *machine) =20 qdev_connect_clock_in(DEVICE(&s->tsp), "sysclk", s->tsp_sysclk); if (!object_property_set_link(OBJECT(&s->tsp), "memory", - OBJECT(&s->tsp_memory), &error_abort)) { + OBJECT(&s->tsp_memory), errp)) { return; } =20 soc =3D ASPEED_SOC(&s->tsp); aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART7, serial_hd(2)); - if (!qdev_realize(DEVICE(&s->tsp), NULL, &error_abort)) { + if (!qdev_realize(DEVICE(&s->tsp), NULL, errp)) { return; } } --=20 2.43.0