From nobody Sun Sep 28 16:28:22 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1758693474; cv=none; d=zohomail.com; s=zohoarc; b=KWWmx86otwEWQToAxJXtHjf+f22rMCNpbvrx6DkNJlBGy0M1Sgdh2wbkJrflTE+Y5QEM2U2v4ifbx7K1Z6gtMRx8w2GN4I7+F0FZZo/eEmMmFfZ4VMrTXDfzV26cAK+6pexUtTW4gY9iqEMc+tVboz9Umv4NU5Mo8KFeeztfTmE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1758693474; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=vG1FSB+DvjImK8RmHcmFh/jCF3FKJ5rrCH8Yso5hdI0=; b=CEjJYWCFTZE3+jMII+30PO3xUhH7QnS3deicej81M11UWWUWeYr6pDFmO9dEA68VGa2s3c4Apg3tsNGh32tUIbbqC1IoEr9z1q9mL9xJU3pcVDhrDAKqIk1xWnfOCI1Xwr/UYdK6uuOJW5q8vXE+WQuNsdjwl/Tr7C7RuOqbjXA= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1758693474369352.6632059712872; Tue, 23 Sep 2025 22:57:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v1IUT-0002kE-84; Wed, 24 Sep 2025 01:56:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUJ-0002bF-6h; Wed, 24 Sep 2025 01:56:23 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUF-0000It-5T; Wed, 24 Sep 2025 01:56:21 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 24 Sep 2025 13:56:03 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 24 Sep 2025 13:56:03 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 1/7] hw/arm/aspeed: Move aspeed_board_init_flashes() to common SoC code Date: Wed, 24 Sep 2025 13:55:55 +0800 Message-ID: <20250924055602.294857-2-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250924055602.294857-1-jamin_lin@aspeedtech.com> References: <20250924055602.294857-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758693475599116600 Content-Type: text/plain; charset="utf-8" Relocate aspeed_board_init_flashes() from hw/arm/aspeed.c into hw/arm/aspeed_soc_common.c so the helper can be reused by all ASPEED machines. The API was already declared in include/hw/arm/aspeed_soc.h; this change moves its implementation out of the machine file to keep aspeed.c cleaner. No functional change. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- hw/arm/aspeed.c | 22 ---------------------- hw/arm/aspeed_soc_common.c | 23 +++++++++++++++++++++++ 2 files changed, 23 insertions(+), 22 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index d21b21965a..55f0afe0a4 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -337,28 +337,6 @@ static void aspeed_load_vbootrom(AspeedMachineState *b= mc, const char *bios_name, } } =20 -void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, - unsigned int count, int unit0) -{ - int i; - - if (!flashtype) { - return; - } - - for (i =3D 0; i < count; ++i) { - DriveInfo *dinfo =3D drive_get(IF_MTD, 0, unit0 + i); - DeviceState *dev; - - dev =3D qdev_new(flashtype); - if (dinfo) { - qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo)); - } - qdev_prop_set_uint8(dev, "cs", i); - qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal); - } -} - static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo, bool e= mmc, bool boot_emmc) { diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c index 1c4ac93a0f..31b1e683c3 100644 --- a/hw/arm/aspeed_soc_common.c +++ b/hw/arm/aspeed_soc_common.c @@ -16,6 +16,7 @@ #include "hw/misc/unimp.h" #include "hw/arm/aspeed_soc.h" #include "hw/char/serial-mm.h" +#include "system/blockdev.h" =20 =20 const char *aspeed_soc_cpu_type(AspeedSoCClass *sc) @@ -124,6 +125,28 @@ void aspeed_mmio_map_unimplemented(AspeedSoCState *s, = SysBusDevice *dev, sysbus_mmio_get_region(dev, 0), -1= 000); } =20 +void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, + unsigned int count, int unit0) +{ + int i; + + if (!flashtype) { + return; + } + + for (i =3D 0; i < count; ++i) { + DriveInfo *dinfo =3D drive_get(IF_MTD, 0, unit0 + i); + DeviceState *dev; + + dev =3D qdev_new(flashtype); + if (dinfo) { + qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo)); + } + qdev_prop_set_uint8(dev, "cs", i); + qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal); + } +} + static void aspeed_soc_realize(DeviceState *dev, Error **errp) { AspeedSoCState *s =3D ASPEED_SOC(dev); --=20 2.43.0 From nobody Sun Sep 28 16:28:22 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1758693473; cv=none; d=zohomail.com; s=zohoarc; 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Wed, 24 Sep 2025 13:56:03 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 2/7] hw/arm/aspeed: Move write_boot_rom to common SoC code Date: Wed, 24 Sep 2025 13:55:56 +0800 Message-ID: <20250924055602.294857-3-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250924055602.294857-1-jamin_lin@aspeedtech.com> References: <20250924055602.294857-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758693475683116600 Content-Type: text/plain; charset="utf-8" Move the write_boot_rom helper from hw/arm/aspeed.c into hw/arm/aspeed_soc_common.c so it can be reused by all ASPEED machines. Export the API as aspeed_write_boot_rom() in include/hw/arm/aspeed_soc.h and update the existing call site to use the new helper. No functional change. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- include/hw/arm/aspeed_soc.h | 2 ++ hw/arm/aspeed.c | 33 ++------------------------------- hw/arm/aspeed_soc_common.c | 31 +++++++++++++++++++++++++++++++ 3 files changed, 35 insertions(+), 31 deletions(-) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index aaf518d179..5567bdcb69 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -312,6 +312,8 @@ void aspeed_mmio_map_unimplemented(AspeedSoCState *s, S= ysBusDevice *dev, uint64_t size); void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, unsigned int count, int unit0); +void aspeed_write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size, + Error **errp); =20 static inline int aspeed_uart_index(int uart_dev) { diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 55f0afe0a4..4d0d935836 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -263,35 +263,6 @@ static void aspeed_reset_secondary(ARMCPU *cpu, cpu_set_pc(cs, info->smp_loader_start); } =20 -static void write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size, - Error **errp) -{ - g_autofree void *storage =3D NULL; - int64_t size; - - /* - * The block backend size should have already been 'validated' by - * the creation of the m25p80 object. - */ - size =3D blk_getlength(blk); - if (size <=3D 0) { - error_setg(errp, "failed to get flash size"); - return; - } - - if (rom_size > size) { - rom_size =3D size; - } - - storage =3D g_malloc0(rom_size); - if (blk_pread(blk, 0, rom_size, storage, 0) < 0) { - error_setg(errp, "failed to read the initial flash content"); - return; - } - - rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr); -} - /* * Create a ROM and copy the flash contents at the expected address * (0x0). Boots faster than execute-in-place. @@ -306,8 +277,8 @@ static void aspeed_install_boot_rom(AspeedMachineState = *bmc, BlockBackend *blk, &error_abort); memory_region_add_subregion_overlap(&soc->spi_boot_container, 0, &bmc->boot_rom, 1); - write_boot_rom(blk, sc->memmap[ASPEED_DEV_SPI_BOOT], - rom_size, &error_abort); + aspeed_write_boot_rom(blk, sc->memmap[ASPEED_DEV_SPI_BOOT], rom_size, + &error_abort); } =20 #define VBOOTROM_FILE_NAME "ast27x0_bootrom.bin" diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c index 31b1e683c3..d0a400725f 100644 --- a/hw/arm/aspeed_soc_common.c +++ b/hw/arm/aspeed_soc_common.c @@ -17,6 +17,8 @@ #include "hw/arm/aspeed_soc.h" #include "hw/char/serial-mm.h" #include "system/blockdev.h" +#include "system/block-backend.h" +#include "hw/loader.h" =20 =20 const char *aspeed_soc_cpu_type(AspeedSoCClass *sc) @@ -147,6 +149,35 @@ void aspeed_board_init_flashes(AspeedSMCState *s, cons= t char *flashtype, } } =20 +void aspeed_write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size, + Error **errp) +{ + g_autofree void *storage =3D NULL; + int64_t size; + + /* + * The block backend size should have already been 'validated' by + * the creation of the m25p80 object. + */ + size =3D blk_getlength(blk); + if (size <=3D 0) { + error_setg(errp, "failed to get flash size"); + return; + } + + if (rom_size > size) { + rom_size =3D size; + } + + storage =3D g_malloc0(rom_size); + if (blk_pread(blk, 0, rom_size, storage, 0) < 0) { + error_setg(errp, "failed to read the initial flash content"); + return; + } + + rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr); +} + static void aspeed_soc_realize(DeviceState *dev, Error **errp) { AspeedSoCState *s =3D ASPEED_SOC(dev); --=20 2.43.0 From nobody Sun Sep 28 16:28:22 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; 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helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758693475665116600 Move the boot ROM install helper into common SoC code so it can be reused by all ASPEED boards, and decouple the API from AspeedMachineState. Specifically: - Move aspeed_install_boot_rom() to hw/arm/aspeed_soc_common.c and declare it in include/hw/arm/aspeed_soc.h. - Change the helper=E2=80=99s signature to take AspeedSoCState * and a MemoryRegion * provided by the caller, instead of AspeedMachineState *. - Update aspeed_machine_init() call sites accordingly. No functional change. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- include/hw/arm/aspeed_soc.h | 2 ++ hw/arm/aspeed.c | 23 +++-------------------- hw/arm/aspeed_soc_common.c | 17 +++++++++++++++++ 3 files changed, 22 insertions(+), 20 deletions(-) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 5567bdcb69..aea210a8e2 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -314,6 +314,8 @@ void aspeed_board_init_flashes(AspeedSMCState *s, const= char *flashtype, unsigned int count, int unit0); void aspeed_write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size, Error **errp); +void aspeed_install_boot_rom(AspeedSoCState *soc, BlockBackend *blk, + MemoryRegion *boot_rom, uint64_t rom_size); =20 static inline int aspeed_uart_index(int uart_dev) { diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 4d0d935836..429f4c6d77 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -263,24 +263,6 @@ static void aspeed_reset_secondary(ARMCPU *cpu, cpu_set_pc(cs, info->smp_loader_start); } =20 -/* - * Create a ROM and copy the flash contents at the expected address - * (0x0). Boots faster than execute-in-place. - */ -static void aspeed_install_boot_rom(AspeedMachineState *bmc, BlockBackend = *blk, - uint64_t rom_size) -{ - AspeedSoCState *soc =3D bmc->soc; - AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(soc); - - memory_region_init_rom(&bmc->boot_rom, NULL, "aspeed.boot_rom", rom_si= ze, - &error_abort); - memory_region_add_subregion_overlap(&soc->spi_boot_container, 0, - &bmc->boot_rom, 1); - aspeed_write_boot_rom(blk, sc->memmap[ASPEED_DEV_SPI_BOOT], rom_size, - &error_abort); -} - #define VBOOTROM_FILE_NAME "ast27x0_bootrom.bin" =20 /* @@ -460,9 +442,10 @@ static void aspeed_machine_init(MachineState *machine) =20 if (fmc0 && !boot_emmc) { uint64_t rom_size =3D memory_region_size(&bmc->soc->spi_boot); - aspeed_install_boot_rom(bmc, fmc0, rom_size); + aspeed_install_boot_rom(bmc->soc, fmc0, &bmc->boot_rom, rom_si= ze); } else if (emmc0) { - aspeed_install_boot_rom(bmc, blk_by_legacy_dinfo(emmc0), 64 * = KiB); + aspeed_install_boot_rom(bmc->soc, blk_by_legacy_dinfo(emmc0), + &bmc->boot_rom, 64 * KiB); } } =20 diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c index d0a400725f..7f104f8de5 100644 --- a/hw/arm/aspeed_soc_common.c +++ b/hw/arm/aspeed_soc_common.c @@ -178,6 +178,23 @@ void aspeed_write_boot_rom(BlockBackend *blk, hwaddr a= ddr, size_t rom_size, rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr); } =20 +/* + * Create a ROM and copy the flash contents at the expected address + * (0x0). Boots faster than execute-in-place. + */ +void aspeed_install_boot_rom(AspeedSoCState *soc, BlockBackend *blk, + MemoryRegion *boot_rom, uint64_t rom_size) +{ + AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(soc); + + memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom", rom_size, + &error_abort); + memory_region_add_subregion_overlap(&soc->spi_boot_container, 0, + boot_rom, 1); + aspeed_write_boot_rom(blk, sc->memmap[ASPEED_DEV_SPI_BOOT], rom_size, + &error_abort); +} + static void aspeed_soc_realize(DeviceState *dev, Error **errp) { AspeedSoCState *s =3D ASPEED_SOC(dev); --=20 2.43.0 From nobody Sun Sep 28 16:28:22 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1758693472; cv=none; d=zohomail.com; s=zohoarc; b=Hvw79wsWWIEYHM7spHeIU3/2q8+TEbt0zW7y4NkS331C9iA3bgehsvkK4MUqIphySPV91HgGiXRCwDGrrP7zK3AFLlSTEmj450WCy5WNuTQQqriGQskO9+M8qH/2kJFE3VsHwTqC6kBpH5Zk8YDBW1RKZBS0sWzsn9TRj9F7Klk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1758693472; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=YI49IUCSByBXwC8F1nQDiiUwgPGS6gP9ycCzXAjHkJk=; b=k5gUEPQbpe7UTfALsTwHzm8mWGIk/W3VwTkC9raFRIs138ji27PEOm2blcKk4S0HrrAVDdSJpyl4dJUVb3ceWXIzttqfjAzuDo5aGSQPqSmTHaIG1PKBTuMYxDzIcj5HKh9WCyFn5Fc7xoD9eYGIwMTQ7pl44LZgzlOUx94Cdbo= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1758693472351502.58383448102734; Tue, 23 Sep 2025 22:57:52 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v1IUo-0003z1-Pn; Wed, 24 Sep 2025 01:56:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUb-0003SK-2a; Wed, 24 Sep 2025 01:56:42 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUY-0000It-Bg; Wed, 24 Sep 2025 01:56:40 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 24 Sep 2025 13:56:04 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 24 Sep 2025 13:56:04 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 4/7] hw/arm/aspeed: Move aspeed_load_vbootrom to common SoC code Date: Wed, 24 Sep 2025 13:55:58 +0800 Message-ID: <20250924055602.294857-5-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250924055602.294857-1-jamin_lin@aspeedtech.com> References: <20250924055602.294857-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758693474218116600 Move the vbootrom loader helper into common SoC code so it can be reused by all ASPEED boards, and decouple the API from AspeedMachineState. Specifically: - Move aspeed_load_vbootrom() to hw/arm/aspeed_soc_common.c and declare it in include/hw/arm/aspeed_soc.h. - Change the helper=E2=80=99s signature to take AspeedSoCState * instead of AspeedMachineState *. - Update aspeed_machine_init() call sites accordingly. No functional change. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- include/hw/arm/aspeed_soc.h | 4 ++++ hw/arm/aspeed.c | 31 +------------------------------ hw/arm/aspeed_soc_common.c | 25 +++++++++++++++++++++++++ 3 files changed, 30 insertions(+), 30 deletions(-) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index aea210a8e2..ed32efb543 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -43,6 +43,8 @@ #include "hw/char/serial-mm.h" #include "hw/intc/arm_gicv3.h" =20 +#define VBOOTROM_FILE_NAME "ast27x0_bootrom.bin" + #define ASPEED_SPIS_NUM 3 #define ASPEED_EHCIS_NUM 4 #define ASPEED_WDTS_NUM 8 @@ -316,6 +318,8 @@ void aspeed_write_boot_rom(BlockBackend *blk, hwaddr ad= dr, size_t rom_size, Error **errp); void aspeed_install_boot_rom(AspeedSoCState *soc, BlockBackend *blk, MemoryRegion *boot_rom, uint64_t rom_size); +void aspeed_load_vbootrom(AspeedSoCState *soc, const char *bios_name, + Error **errp); =20 static inline int aspeed_uart_index(int uart_dev) { diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 429f4c6d77..6046ec0bb2 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -26,9 +26,7 @@ #include "hw/qdev-properties.h" #include "system/block-backend.h" #include "system/reset.h" -#include "hw/loader.h" #include "qemu/error-report.h" -#include "qemu/datadir.h" #include "qemu/units.h" #include "hw/qdev-clock.h" #include "system/system.h" @@ -263,33 +261,6 @@ static void aspeed_reset_secondary(ARMCPU *cpu, cpu_set_pc(cs, info->smp_loader_start); } =20 -#define VBOOTROM_FILE_NAME "ast27x0_bootrom.bin" - -/* - * This function locates the vbootrom image file specified via the command= line - * using the -bios option. It loads the specified image into the vbootrom - * memory region and handles errors if the file cannot be found or loaded. - */ -static void aspeed_load_vbootrom(AspeedMachineState *bmc, const char *bios= _name, - Error **errp) -{ - g_autofree char *filename =3D NULL; - AspeedSoCState *soc =3D bmc->soc; - int ret; - - filename =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - if (!filename) { - error_setg(errp, "Could not find vbootrom image '%s'", bios_name); - return; - } - - ret =3D load_image_mr(filename, &soc->vbootrom); - if (ret < 0) { - error_setg(errp, "Failed to load vbootrom image '%s'", bios_name); - return; - } -} - static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo, bool e= mmc, bool boot_emmc) { @@ -451,7 +422,7 @@ static void aspeed_machine_init(MachineState *machine) =20 if (amc->vbootrom) { bios_name =3D machine->firmware ?: VBOOTROM_FILE_NAME; - aspeed_load_vbootrom(bmc, bios_name, &error_abort); + aspeed_load_vbootrom(bmc->soc, bios_name, &error_abort); } =20 arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo); diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c index 7f104f8de5..bc70e864fb 100644 --- a/hw/arm/aspeed_soc_common.c +++ b/hw/arm/aspeed_soc_common.c @@ -19,6 +19,7 @@ #include "system/blockdev.h" #include "system/block-backend.h" #include "hw/loader.h" +#include "qemu/datadir.h" =20 =20 const char *aspeed_soc_cpu_type(AspeedSoCClass *sc) @@ -195,6 +196,30 @@ void aspeed_install_boot_rom(AspeedSoCState *soc, Bloc= kBackend *blk, &error_abort); } =20 +/* + * This function locates the vbootrom image file specified via the command= line + * using the -bios option. It loads the specified image into the vbootrom + * memory region and handles errors if the file cannot be found or loaded. + */ +void aspeed_load_vbootrom(AspeedSoCState *soc, const char *bios_name, + Error **errp) +{ + g_autofree char *filename =3D NULL; + int ret; + + filename =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); + if (!filename) { + error_setg(errp, "Could not find vbootrom image '%s'", bios_name); + return; + } + + ret =3D load_image_mr(filename, &soc->vbootrom); + if (ret < 0) { + error_setg(errp, "Failed to load vbootrom image '%s'", bios_name); + return; + } +} + static void aspeed_soc_realize(DeviceState *dev, Error **errp) { AspeedSoCState *s =3D ASPEED_SOC(dev); --=20 2.43.0 From nobody Sun Sep 28 16:28:22 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1758693472; cv=none; d=zohomail.com; s=zohoarc; b=c8VUM8caxKgblbYaMOfSAemV6V0F0D4STWp7AP/jukMH2dJLFzKLqk++mDee3B9kGwmRZTCMtaWDMTHonmLC3MqCbuwOckeNNJ4AMVLJUQRqRZo4ZqWsw3uwpI99VKgIaMA3Q26VN43wgu8t7mwotrURuS/Tfy76bruyUmBXFVs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1758693472; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=7tqhd20YO879ZbkD6BM7HQOnS/oM/eAQzAmM0mPfBp0=; b=kyUQGcrs+MSbPZOB3TOAOW2BcUPo/9KzfIFD8fAWwSh36AqbfL1AXhQINp7VbfGKZL3PttZEsGAlP0u6VYAo5KstCxGFBneU4xhdni6Q5h50v/4H2JxkkgI+9fJjeCbZKw8UbVwXck8dT1WFjM7JXHiJ2hj+4SZTJ9UgAkQv+JY= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1758693472699991.7856798152951; Tue, 23 Sep 2025 22:57:52 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v1IUq-00042v-0l; Wed, 24 Sep 2025 01:56:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUh-0003gZ-3c; Wed, 24 Sep 2025 01:56:52 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUc-0000It-48; Wed, 24 Sep 2025 01:56:45 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 24 Sep 2025 13:56:04 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 24 Sep 2025 13:56:04 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 5/7] hw/arm/aspeed_ast27x0-fc: Replace error_abort with local errp Date: Wed, 24 Sep 2025 13:55:59 +0800 Message-ID: <20250924055602.294857-6-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250924055602.294857-1-jamin_lin@aspeedtech.com> References: <20250924055602.294857-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758693474248116600 Content-Type: text/plain; charset="utf-8" This patch introduces a local Error **errp =3D NULL and replaces error_abort with errp in these paths. This makes error handling more consistent with QEMU guidelines and avoids using error_abort in cases where failure should not be treated as a programming error. Discussion: object_property_set_link() can return false only when it fails, and it sets an error when it fails. Since passing &error_abort causes an abort, the function never returns false, and the return statement is effectively dead code. If failure is considered a programming error, using &error_abort is correct. However, if failure is not a programming error, passing &error_abort is wrong, and errp should be used instead. This patch follows the latter approach by replacing error_abort with errp. https://patchwork.kernel.org/project/qemu-devel/patch/20250717034054.190399= 1-3-jamin_lin@aspeedtech.com/#26540626 Signed-off-by: Jamin Lin --- hw/arm/aspeed_ast27x0-fc.c | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c index 7087be4288..b15cb94c39 100644 --- a/hw/arm/aspeed_ast27x0-fc.c +++ b/hw/arm/aspeed_ast27x0-fc.c @@ -61,6 +61,7 @@ static void ast2700fc_ca35_init(MachineState *machine) Ast2700FCState *s =3D AST2700A1FC(machine); AspeedSoCState *soc; AspeedSoCClass *sc; + Error **errp =3D NULL; =20 object_initialize_child(OBJECT(s), "ca35", &s->ca35, "ast2700-a1"); soc =3D ASPEED_SOC(&s->ca35); @@ -71,20 +72,20 @@ static void ast2700fc_ca35_init(MachineState *machine) memory_region_add_subregion(get_system_memory(), 0, &s->ca35_memory); =20 if (!memory_region_init_ram(&s->ca35_dram, OBJECT(&s->ca35), "ca35-dra= m", - AST2700FC_BMC_RAM_SIZE, &error_abort)) { + AST2700FC_BMC_RAM_SIZE, errp)) { return; } if (!object_property_set_link(OBJECT(&s->ca35), "memory", OBJECT(&s->ca35_memory), - &error_abort)) { + errp)) { return; }; if (!object_property_set_link(OBJECT(&s->ca35), "dram", - OBJECT(&s->ca35_dram), &error_abort)) { + OBJECT(&s->ca35_dram), errp)) { return; } if (!object_property_set_int(OBJECT(&s->ca35), "ram-size", - AST2700FC_BMC_RAM_SIZE, &error_abort)) { + AST2700FC_BMC_RAM_SIZE, errp)) { return; } =20 @@ -95,15 +96,15 @@ static void ast2700fc_ca35_init(MachineState *machine) } } if (!object_property_set_int(OBJECT(&s->ca35), "hw-strap1", - AST2700FC_HW_STRAP1, &error_abort)) { + AST2700FC_HW_STRAP1, errp)) { return; } if (!object_property_set_int(OBJECT(&s->ca35), "hw-strap2", - AST2700FC_HW_STRAP2, &error_abort)) { + AST2700FC_HW_STRAP2, errp)) { return; } aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART12, serial_hd(0)); - if (!qdev_realize(DEVICE(&s->ca35), NULL, &error_abort)) { + if (!qdev_realize(DEVICE(&s->ca35), NULL, errp)) { return; } =20 @@ -125,6 +126,8 @@ static void ast2700fc_ssp_init(MachineState *machine) { AspeedSoCState *soc; Ast2700FCState *s =3D AST2700A1FC(machine); + Error **errp =3D NULL; + s->ssp_sysclk =3D clock_new(OBJECT(s), "SSP_SYSCLK"); clock_set_hz(s->ssp_sysclk, 200000000ULL); =20 @@ -134,13 +137,13 @@ static void ast2700fc_ssp_init(MachineState *machine) =20 qdev_connect_clock_in(DEVICE(&s->ssp), "sysclk", s->ssp_sysclk); if (!object_property_set_link(OBJECT(&s->ssp), "memory", - OBJECT(&s->ssp_memory), &error_abort)) { + OBJECT(&s->ssp_memory), errp)) { return; } =20 soc =3D ASPEED_SOC(&s->ssp); aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART4, serial_hd(1)); - if (!qdev_realize(DEVICE(&s->ssp), NULL, &error_abort)) { + if (!qdev_realize(DEVICE(&s->ssp), NULL, errp)) { return; } } @@ -149,6 +152,8 @@ static void ast2700fc_tsp_init(MachineState *machine) { AspeedSoCState *soc; Ast2700FCState *s =3D AST2700A1FC(machine); + Error **errp =3D NULL; + s->tsp_sysclk =3D clock_new(OBJECT(s), "TSP_SYSCLK"); clock_set_hz(s->tsp_sysclk, 200000000ULL); =20 @@ -158,13 +163,13 @@ static void ast2700fc_tsp_init(MachineState *machine) =20 qdev_connect_clock_in(DEVICE(&s->tsp), "sysclk", s->tsp_sysclk); if (!object_property_set_link(OBJECT(&s->tsp), "memory", - OBJECT(&s->tsp_memory), &error_abort)) { + OBJECT(&s->tsp_memory), errp)) { return; } =20 soc =3D ASPEED_SOC(&s->tsp); aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART7, serial_hd(2)); - if (!qdev_realize(DEVICE(&s->tsp), NULL, &error_abort)) { + if (!qdev_realize(DEVICE(&s->tsp), NULL, errp)) { return; } } --=20 2.43.0 From nobody Sun Sep 28 16:28:22 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1758693529; cv=none; d=zohomail.com; s=zohoarc; b=B+BaZVKNFTzMmwrLJLHcbObNVH/Aedu1cGKkL0Y0DA0yOX7NIsJTm79jSoIoWEmHr2fDH5JLjqc8IMsWN+762iyIygnrctgm2Ip6oS6b/ZsNcpicOKTDGXkttEWK9aY9fY/YqnfV0G1fkCZ3x9uSfPy4L6A8mLBZO0HCEyfY/U4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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Wed, 24 Sep 2025 01:56:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUo-0003xd-Dc; Wed, 24 Sep 2025 01:56:54 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUl-0000It-7m; Wed, 24 Sep 2025 01:56:54 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 24 Sep 2025 13:56:04 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 24 Sep 2025 13:56:04 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 6/7] hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM Date: Wed, 24 Sep 2025 13:56:00 +0800 Message-ID: <20250924055602.294857-7-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250924055602.294857-1-jamin_lin@aspeedtech.com> References: <20250924055602.294857-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758693530068116600 Content-Type: text/plain; charset="utf-8" This patch introduces a dedicated ca35_boot_rom memory region and copies the FMC0 flash data into it when mmio_exec is disabled. The main purpose of this change is to support the upcoming VBOOTROM , which can directly fetch data from FMC0 flash at the SPI boot ROM base address (0x100000000) without requiring any SPI controller drivers. Signed-off-by: Jamin Lin --- hw/arm/aspeed_ast27x0-fc.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c index b15cb94c39..2e6036b192 100644 --- a/hw/arm/aspeed_ast27x0-fc.c +++ b/hw/arm/aspeed_ast27x0-fc.c @@ -35,6 +35,7 @@ struct Ast2700FCState { =20 MemoryRegion ca35_memory; MemoryRegion ca35_dram; + MemoryRegion ca35_boot_rom; MemoryRegion ssp_memory; MemoryRegion tsp_memory; =20 @@ -61,7 +62,10 @@ static void ast2700fc_ca35_init(MachineState *machine) Ast2700FCState *s =3D AST2700A1FC(machine); AspeedSoCState *soc; AspeedSoCClass *sc; + BlockBackend *fmc0 =3D NULL; + DeviceState *dev =3D NULL; Error **errp =3D NULL; + uint64_t rom_size; =20 object_initialize_child(OBJECT(s), "ca35", &s->ca35, "ast2700-a1"); soc =3D ASPEED_SOC(&s->ca35); @@ -119,6 +123,16 @@ static void ast2700fc_ca35_init(MachineState *machine) ast2700fc_board_info.ram_size =3D machine->ram_size; ast2700fc_board_info.loader_start =3D sc->memmap[ASPEED_DEV_SDRAM]; =20 + if (!s->mmio_exec) { + dev =3D ssi_get_cs(soc->fmc.spi, 0); + fmc0 =3D dev ? m25p80_get_blk(dev) : NULL; + + if (fmc0) { + rom_size =3D memory_region_size(&soc->spi_boot); + aspeed_install_boot_rom(soc, fmc0, &s->ca35_boot_rom, rom_size= ); + } + } + arm_load_kernel(ARM_CPU(first_cpu), machine, &ast2700fc_board_info); } =20 --=20 2.43.0 From nobody Sun Sep 28 16:28:22 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1758693529; cv=none; d=zohomail.com; s=zohoarc; b=U98YsgR5vhMQoM/sXx6Q64QwqzVTD/mqb8ySzwqpcAt922y+rrkxKSmPRhxbqPMY6/aPhHyV44E6t8QASZScwAyUIyxhUPnM43af+/7Dl+3akTVWPGF358hCs/VuZDLw4nRGA0fz4BAmitdhTPBRZmdqkxB+HJW6ZVFIRLMnc+c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1758693529; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=8qi3qUV28sz+dxMqVYNHy1pKzs0rb+pbXhqQfrVQVCs=; b=VGR+tjP3bUKqeYq+FMLgc7j9L0jWK8rN0TMj03rVk2US+3VhmFyBzI8FpMYmbLskUA6mxgMN0TfNqcgdoElz47QK3cy7DlOhB29H0tCUwF5OW4O/6XVHSYOilrYJzdW+5oIuMH+8Gd4eUhFWOgLmPW7S1UAh2viHBfZlUui9wFg= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1758693529790655.5898841563792; Tue, 23 Sep 2025 22:58:49 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v1IUy-0004Ta-GE; Wed, 24 Sep 2025 01:57:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUx-0004QD-8g; Wed, 24 Sep 2025 01:57:03 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUt-0000MY-Mq; Wed, 24 Sep 2025 01:57:02 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 24 Sep 2025 13:56:04 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 24 Sep 2025 13:56:04 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 7/7] hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support Date: Wed, 24 Sep 2025 13:56:01 +0800 Message-ID: <20250924055602.294857-8-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250924055602.294857-1-jamin_lin@aspeedtech.com> References: <20250924055602.294857-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758693532236116600 Content-Type: text/plain; charset="utf-8" Introduces support for loading a vbootrom image into the dedicated vbootrom memory region in the AST2700 Full Core machine. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater --- hw/arm/aspeed_ast27x0-fc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c index 2e6036b192..b2d963e1fe 100644 --- a/hw/arm/aspeed_ast27x0-fc.c +++ b/hw/arm/aspeed_ast27x0-fc.c @@ -62,6 +62,7 @@ static void ast2700fc_ca35_init(MachineState *machine) Ast2700FCState *s =3D AST2700A1FC(machine); AspeedSoCState *soc; AspeedSoCClass *sc; + const char *bios_name =3D NULL; BlockBackend *fmc0 =3D NULL; DeviceState *dev =3D NULL; Error **errp =3D NULL; @@ -133,6 +134,10 @@ static void ast2700fc_ca35_init(MachineState *machine) } } =20 + /* VBOOTROM */ + bios_name =3D machine->firmware ?: VBOOTROM_FILE_NAME; + aspeed_load_vbootrom(soc, bios_name, errp); + arm_load_kernel(ARM_CPU(first_cpu), machine, &ast2700fc_board_info); } =20 --=20 2.43.0