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([71.212.157.132]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-269802e14f1sm168294035ad.71.2025.09.23.14.54.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Sep 2025 14:54:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1758664469; x=1759269269; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hhvyGjhjUkCNEHZh1gnQZUsirw8YiHVeIFO9VlHtSAY=; b=AWk+E3MJVypdb0Q8LFQSvRnrbHSoT61Rg7Rgfs/OSpKa1nHAn8dHKILfurr/S2Mc6Z 3mIet07bHVU3F4cSuUrgLngi/jferYln0ERyW90k6W0l+NCTqIBZCCfXcdmcbgYEoFMz QhOo2H5G6PnLjN6y8Osz0pCXbtTW6OEo/Z4s9szT0xPMyToTgl63DyBS7ffoRLPPVkbZ /xf7FJ0TEmZ6Ldv87IBQsiX4TC5JrwIVv8/2V9SfKMjv6lPI0716vsebOJwCtyW7P29f 2t+ueoMfngFlTrNtpdstFj48yp4b9n15QXqOaC30bSov2lN6SP31qVLEQdF5m4XTA+A3 pP6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758664469; x=1759269269; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hhvyGjhjUkCNEHZh1gnQZUsirw8YiHVeIFO9VlHtSAY=; b=F1GmlrzTXvxEhoXcPw+J3a3ngM7tIc5NfD/sEtqcLbeGNos5x+xGPEDZM6C1fh7GHe HMvx5H1hX68KHrNTKKqUnX2JKdhtJxbS+taoChQPQ2369uSQKrDovlwKbMTWJ+83u6Ox 9b30ZkzFbBpEOD6l/5KajIrJeywTvUswRN6wp2I2lvgb1DzzvR4dk8GBeGhzwKUx+Z2X VeUbuQREJo4NxZ3TmmeOM/3ItF7WPDc1hMuEGz/5tqX91YMShMenR6e3xYXjPmdQYim2 tAq7f3ZtKpJizY/eTKFR3dLrnKJsf2TeJNn6QOGSFFqRTksMJQDBYLO7dJFgdt6nvuEL fz8w== X-Gm-Message-State: AOJu0YwCETh13yEJ4s3OrAlRvCzEq0OrIsjWAtGtQJgfYkUR7GMycO0i hjFPZ7QPZWIffTVZNsdJmmBw2PU1jw9HURLb8/ThtCF7qoexmaiveiwGqmLjYoGMFLZ6Q4KiovE 0W0ZR X-Gm-Gg: ASbGncvyKyd1hup34UliwFWW03eFH3I0xQT0aryOJGUqimCDhjxWkEduAp4lbbgzyeV I2Rfr9MGQmciT+XzQyirHELm/Ha8xQi/zXk/EMKnj+8pIaxqpNQXncmtkave9XzsIwnHI/YhSFk 2zsZrfUL8GJ0+SnF3YSScuSKHRV7/rbTlVrFqoTWUFqandOXyFRODjE1ZlW2s6/iAh5j26N8EsM xAoXZMmS5oXkVsOCKajJlZi6SeIpffSAJR6td9xIH1xSbthAwuYFTcuxaGPKBz3W4v/qV1XfM3B 2hkcm26B6OsIyevdQXqxaSGkDwp+Q60bpjsF7fAWOqblh5DW39c9wU+ZW3pyQG/eU8F3uS65Tmb GIv2bs8gjLSKdFZ5H9v1trEZWvq9m X-Google-Smtp-Source: AGHT+IEn5Oxb4i7FOn1Fa1bspf261Rtx1+QilAne9nm+qkS/xMq3hv8VeYEzqIOg+U/w2wEG5n8rpA== X-Received: by 2002:a17:902:e84f:b0:26a:589b:cf11 with SMTP id d9443c01a7336-27cc678387amr56335895ad.43.1758664469096; Tue, 23 Sep 2025 14:54:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Pierrick Bouvier Subject: [PATCH v3 03/10] target/riscv: Record misa_ext in TCGTBCPUState.cs_base Date: Tue, 23 Sep 2025 14:54:17 -0700 Message-ID: <20250923215425.3685950-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250923215425.3685950-1-richard.henderson@linaro.org> References: <20250923215425.3685950-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1758664519642116600 Content-Type: text/plain; charset="utf-8" The tb_flush within write_misa was incorrect. It assumed that we could adjust the ISA of the current processor and discard all TB and all would be well. But MISA is per vcpu, so globally flushing TB does not mean that the TB matches the MISA of any given vcpu. By recording misa in the tb state, we ensure that the code generated matches the vcpu. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/riscv/csr.c | 3 --- target/riscv/tcg/tcg-cpu.c | 3 ++- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 8842e07a73..3c8989f522 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -25,7 +25,6 @@ #include "pmu.h" #include "time_helper.h" #include "exec/cputlb.h" -#include "exec/tb-flush.h" #include "exec/icount.h" #include "accel/tcg/getpc.h" #include "qemu/guest-random.h" @@ -2173,8 +2172,6 @@ static RISCVException write_misa(CPURISCVState *env, = int csrno, env->mstatus &=3D ~MSTATUS_FS; } =20 - /* flush translation cache */ - tb_flush(env_cpu(env)); env->xl =3D riscv_cpu_mxl(env); return RISCV_EXCP_NONE; } diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 78fb279184..143ab079d4 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -191,7 +191,8 @@ static TCGTBCPUState riscv_get_tb_cpu_state(CPUState *c= s) =20 return (TCGTBCPUState){ .pc =3D env->xl =3D=3D MXL_RV32 ? env->pc & UINT32_MAX : env->pc, - .flags =3D flags + .flags =3D flags, + .cs_base =3D env->misa_ext, }; } =20 --=20 2.43.0