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Tue, 23 Sep 2025 03:41:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEQHA7tA9o69d7U0g0p3zAVDXr1/8g6AOZ2G8tUZEkq3lbwxBT9w7wKwDklgOoCyuqiIRJtEw== X-Received: by 2002:a17:907:1c27:b0:b0c:8280:4f40 with SMTP id a640c23a62f3a-b30263b326cmr185966466b.4.1758624101222; Tue, 23 Sep 2025 03:41:41 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: hector.cao@canonical.com, lk@c--e.de, berrange@redhat.com Subject: [RFT PATCH v2 1/2] target/i386: add compatibility property for arch_capabilities Date: Tue, 23 Sep 2025 12:41:35 +0200 Message-ID: <20250923104136.133875-2-pbonzini@redhat.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250923104136.133875-1-pbonzini@redhat.com> References: <20250923104136.133875-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.442, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1758624135978116600 Content-Type: text/plain; charset="utf-8" Prior to v10.1, if requested by user, arch-capabilities is always on despite the fact that CPUID advertises it to be off/unvailable. This causes a migration issue for VMs that are run on a machine without arch-capabilities and expect this feature to be present on the destination host with QEMU 10.1. Add a compatibility property to restore the legacy behavior for all machines with version prior to 10.1. Co-authored-by: Hector Cao Signed-off-by: Hector Cao Fixes: d3a24134e37 ("target/i386: do not expose ARCH_CAPABILITIES on AMD CP= U", 2025-07-17) Signed-off-by: Paolo Bonzini Reviewed-by: Zhao Liu --- target/i386/cpu.h | 6 ++++++ hw/i386/pc.c | 1 + target/i386/cpu.c | 17 +++++++++++++++++ target/i386/kvm/kvm.c | 6 +----- 4 files changed, 25 insertions(+), 5 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index e0be7a74068..414ca968e84 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2314,6 +2314,12 @@ struct ArchCPU { /* Forcefully disable KVM PV features not exposed in guest CPUIDs */ bool kvm_pv_enforce_cpuid; =20 + /* + * Expose arch-capabilities unconditionally even on AMD models, for ba= ckwards + * compatibility with QEMU <10.1. + */ + bool arch_cap_always_on; + /* Number of physical address bits supported */ uint32_t phys_bits; =20 diff --git a/hw/i386/pc.c b/hw/i386/pc.c index bc048a6d137..d7f48150fdd 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -87,6 +87,7 @@ const size_t pc_compat_10_1_len =3D G_N_ELEMENTS(pc_compa= t_10_1); GlobalProperty pc_compat_10_0[] =3D { { TYPE_X86_CPU, "x-consistent-cache", "false" }, { TYPE_X86_CPU, "x-vendor-cpuid-only-v2", "false" }, + { TYPE_X86_CPU, "x-arch-cap-always-on", "true" }, }; const size_t pc_compat_10_0_len =3D G_N_ELEMENTS(pc_compat_10_0); =20 diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 6d85149e6e1..fe369bb1284 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7539,6 +7539,20 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *= cpu, FeatureWord w) #endif break; =20 + case FEAT_7_0_EDX: + /* + * Windows does not like ARCH_CAPABILITIES on AMD machines at all. + * Do not show the fake ARCH_CAPABILITIES MSR that KVM sets up, + * except if needed for migration. + * + * When arch_cap_always_on is removed, this tweak can move to + * kvm_arch_get_supported_cpuid. + */ + if (cpu && IS_AMD_CPU(&cpu->env) && !cpu->arch_cap_always_on) { + unavail =3D CPUID_7_0_EDX_ARCH_CAPABILITIES; + } + break; + default: break; } @@ -10004,6 +10018,9 @@ static const Property x86_cpu_properties[] =3D { true), DEFINE_PROP_BOOL("x-l1-cache-per-thread", X86CPU, l1_cache_per_core, t= rue), DEFINE_PROP_BOOL("x-force-cpuid-0x1f", X86CPU, force_cpuid_0x1f, false= ), + + DEFINE_PROP_BOOL("x-arch-cap-always-on", X86CPU, + arch_cap_always_on, false), }; =20 #ifndef CONFIG_USER_ONLY diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 6a3a1c1ed8e..db40caa3412 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -503,12 +503,8 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uin= t32_t function, * Linux v4.17-v4.20 incorrectly return ARCH_CAPABILITIES on SVM h= osts. * We can detect the bug by checking if MSR_IA32_ARCH_CAPABILITIES= is * returned by KVM_GET_MSR_INDEX_LIST. - * - * But also, because Windows does not like ARCH_CAPABILITIES on AMD - * mcahines at all, do not show the fake ARCH_CAPABILITIES MSR that - * KVM sets up. */ - if (!has_msr_arch_capabs || !(edx & CPUID_7_0_EDX_ARCH_CAPABILITIE= S)) { + if (!has_msr_arch_capabs) { ret &=3D ~CPUID_7_0_EDX_ARCH_CAPABILITIES; } } else if (function =3D=3D 7 && index =3D=3D 1 && reg =3D=3D R_EAX) { --=20 2.51.0