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Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/hw/core/cpu.h | 7 +++++++ accel/tcg/cputlb.c | 16 ++++++++-------- tcg/aarch64/tcg-target.c.inc | 2 +- tcg/arm/tcg-target.c.inc | 2 +- 4 files changed, 17 insertions(+), 10 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index a7038b8c07..30e335d7d0 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -594,6 +594,13 @@ static inline CPUArchState *cpu_env(CPUState *cpu) return (CPUArchState *)(cpu + 1); } =20 +#ifdef CONFIG_TCG +static inline CPUTLBDescFast *cpu_tlb_fast(CPUState *cpu, int mmu_idx) +{ + return &cpu->neg.tlb.f[mmu_idx]; +} +#endif + typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ; extern CPUTailQ cpus_queue; =20 diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index d324f33339..2a6aa01c57 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -129,7 +129,7 @@ static inline uint64_t tlb_addr_write(const CPUTLBEntry= *entry) static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx, vaddr addr) { - uintptr_t size_mask =3D cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_= BITS; + uintptr_t size_mask =3D cpu_tlb_fast(cpu, mmu_idx)->mask >> CPU_TLB_EN= TRY_BITS; =20 return (addr >> TARGET_PAGE_BITS) & size_mask; } @@ -138,7 +138,7 @@ static inline uintptr_t tlb_index(CPUState *cpu, uintpt= r_t mmu_idx, static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, vaddr addr) { - return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; + return &cpu_tlb_fast(cpu, mmu_idx)->table[tlb_index(cpu, mmu_idx, addr= )]; } =20 static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns, @@ -292,7 +292,7 @@ static void tlb_flush_one_mmuidx_locked(CPUState *cpu, = int mmu_idx, int64_t now) { CPUTLBDesc *desc =3D &cpu->neg.tlb.d[mmu_idx]; - CPUTLBDescFast *fast =3D &cpu->neg.tlb.f[mmu_idx]; + CPUTLBDescFast *fast =3D cpu_tlb_fast(cpu, mmu_idx); =20 tlb_mmu_resize_locked(desc, fast, now); tlb_mmu_flush_locked(desc, fast); @@ -331,7 +331,7 @@ void tlb_init(CPUState *cpu) cpu->neg.tlb.c.dirty =3D 0; =20 for (i =3D 0; i < NB_MMU_MODES; i++) { - tlb_mmu_init(&cpu->neg.tlb.d[i], &cpu->neg.tlb.f[i], now); + tlb_mmu_init(&cpu->neg.tlb.d[i], cpu_tlb_fast(cpu, i), now); } } =20 @@ -342,7 +342,7 @@ void tlb_destroy(CPUState *cpu) qemu_spin_destroy(&cpu->neg.tlb.c.lock); for (i =3D 0; i < NB_MMU_MODES; i++) { CPUTLBDesc *desc =3D &cpu->neg.tlb.d[i]; - CPUTLBDescFast *fast =3D &cpu->neg.tlb.f[i]; + CPUTLBDescFast *fast =3D cpu_tlb_fast(cpu, i); =20 g_free(fast->table); g_free(desc->fulltlb); @@ -667,7 +667,7 @@ static void tlb_flush_range_locked(CPUState *cpu, int m= idx, unsigned bits) { CPUTLBDesc *d =3D &cpu->neg.tlb.d[midx]; - CPUTLBDescFast *f =3D &cpu->neg.tlb.f[midx]; + CPUTLBDescFast *f =3D cpu_tlb_fast(cpu, midx); vaddr mask =3D MAKE_64BIT_MASK(0, bits); =20 /* @@ -923,7 +923,7 @@ void tlb_reset_dirty(CPUState *cpu, uintptr_t start, ui= ntptr_t length) qemu_spin_lock(&cpu->neg.tlb.c.lock); for (mmu_idx =3D 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { CPUTLBDesc *desc =3D &cpu->neg.tlb.d[mmu_idx]; - CPUTLBDescFast *fast =3D &cpu->neg.tlb.f[mmu_idx]; + CPUTLBDescFast *fast =3D cpu_tlb_fast(cpu, mmu_idx); unsigned int n =3D tlb_n_entries(fast); unsigned int i; =20 @@ -1316,7 +1316,7 @@ static bool victim_tlb_hit(CPUState *cpu, size_t mmu_= idx, size_t index, =20 if (cmp =3D=3D page) { /* Found entry in victim tlb, swap tlb and iotlb. */ - CPUTLBEntry tmptlb, *tlb =3D &cpu->neg.tlb.f[mmu_idx].table[in= dex]; + CPUTLBEntry tmptlb, *tlb =3D &cpu_tlb_fast(cpu, mmu_idx)->tabl= e[index]; =20 qemu_spin_lock(&cpu->neg.tlb.c.lock); copy_tlb_helper_locked(&tmptlb, tlb); diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 3b088b7bd9..caf79c742d 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1668,7 +1668,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext= *s, HostAddress *h, ldst->oi =3D oi; ldst->addr_reg =3D addr_reg; =20 - /* Load cpu->neg.tlb.f[mmu_idx].{mask,table} into {tmp0,tmp1}. */ + /* Load CPUTLBDescFast.{mask,table} into {tmp0,tmp1}. */ QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, mask) !=3D 0); QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, table) !=3D 8); tcg_out_insn(s, 3314, LDP, TCG_REG_TMP0, TCG_REG_TMP1, TCG_AREG0, diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 338c57b061..87ca66bb02 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -1421,7 +1421,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext= *s, HostAddress *h, ldst->oi =3D oi; ldst->addr_reg =3D addr; =20 - /* Load cpu->neg.tlb.f[mmu_idx].{mask,table} into {r0,r1}. */ + /* Load CPUTLBDescFast.{mask,table} into {r0,r1}. */ QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, mask) !=3D 0); QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, table) !=3D 4); tcg_out_ldrd_8(s, COND_AL, TCG_REG_R0, TCG_AREG0, fast_off); --=20 2.43.0