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Mon, 22 Sep 2025 15:34:07 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJCxocLo+9Bo5wulAA--.64540S5; Mon, 22 Sep 2025 15:34:06 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH 3/5] target/loongarch: Set file tcg_cpu.c separate from cpu.c Date: Mon, 22 Sep 2025 15:33:58 +0800 Message-Id: <20250922073400.1308169-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250922073400.1308169-1-maobibo@loongson.cn> References: <20250922073400.1308169-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCxocLo+9Bo5wulAA--.64540S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758526552283116600 Content-Type: text/plain; charset="utf-8" Remove inline included with file tcg_cpu.c, and set it separate with file target/loongarch/cpu.c Signed-off-by: Bibo Mao Reviewed-by: Richard Henderson --- target/loongarch/cpu.c | 9 --------- target/loongarch/tcg/meson.build | 1 + target/loongarch/tcg/tcg_cpu.c | 13 ++++++++++++- target/loongarch/tcg/tcg_loongarch.h | 1 + 4 files changed, 14 insertions(+), 10 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 6eb8c3214a..b449ede56d 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -28,11 +28,6 @@ #ifdef CONFIG_KVM #include #endif -#ifdef CONFIG_TCG -#include "accel/tcg/cpu-ldst.h" -#include "accel/tcg/cpu-ops.h" -#include "tcg/tcg.h" -#endif #include "tcg/tcg_loongarch.h" =20 const char * const regnames[32] =3D { @@ -653,10 +648,6 @@ static void loongarch_cpu_dump_state(CPUState *cs, FIL= E *f, int flags) } } =20 -#ifdef CONFIG_TCG -#include "tcg/tcg_cpu.c" -#endif /* CONFIG_TCG */ - #ifndef CONFIG_USER_ONLY #include "hw/core/sysemu-cpu-ops.h" =20 diff --git a/target/loongarch/tcg/meson.build b/target/loongarch/tcg/meson.= build index bdf34f9673..b7adfe46f1 100644 --- a/target/loongarch/tcg/meson.build +++ b/target/loongarch/tcg/meson.build @@ -7,6 +7,7 @@ loongarch_ss.add([zlib, gen]) loongarch_ss.add(files( 'fpu_helper.c', 'op_helper.c', + 'tcg_cpu.c', 'translate.c', 'vec_helper.c', )) diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index f09a695968..c7f49838e3 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -4,6 +4,17 @@ * * Copyright (c) 2025 Loongson Technology Corporation Limited */ +#include "qemu/osdep.h" +#include "qemu/accel.h" +#include "qemu/error-report.h" +#include "qemu/log.h" +#include "accel/accel-cpu-target.h" +#include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-ops.h" +#include "exec/translation-block.h" +#include "exec/target_page.h" +#include "tcg_loongarch.h" +#include "internals.h" =20 #ifndef CONFIG_USER_ONLY static void loongarch_cpu_do_interrupt(CPUState *cs) @@ -232,7 +243,7 @@ static int loongarch_cpu_mmu_index(CPUState *cs, bool i= fetch) return MMU_DA_IDX; } =20 -static const TCGCPUOps loongarch_tcg_ops =3D { +const TCGCPUOps loongarch_tcg_ops =3D { .guest_default_memory_order =3D 0, .mttcg_supported =3D true, =20 diff --git a/target/loongarch/tcg/tcg_loongarch.h b/target/loongarch/tcg/tc= g_loongarch.h index 47702893e3..7fb627f2d6 100644 --- a/target/loongarch/tcg/tcg_loongarch.h +++ b/target/loongarch/tcg/tcg_loongarch.h @@ -9,6 +9,7 @@ #include "cpu.h" #include "cpu-mmu.h" =20 +extern const TCGCPUOps loongarch_tcg_ops; void loongarch_csr_translate_init(void); =20 bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size, --=20 2.39.3