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Reviewed-by: Jonathan Cameron Reviewed-by: Eric Auger Tested-by: Eric Auger Tested-by: Nicolin Chen Signed-off-by: Shameer Kolothum Signed-off-by: Shameer Kolothum Reviewed-by: Donald Dutile Reviewed-by: Nicolin Chen Message-id: 20250829082543.7680-9-skolothumtho@nvidia.com Signed-off-by: Peter Maydell --- qemu-options.hx | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/qemu-options.hx b/qemu-options.hx index aa44b0e34ae..075f4be2e3e 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -1231,6 +1231,13 @@ SRST ``aw-bits=3Dval`` (val between 32 and 64, default depends on machine) This decides the address width of the IOVA address space. =20 +``-device arm-smmuv3,primary-bus=3Did`` + This is only supported by ``-machine virt`` (ARM). + + ``primary-bus=3Did`` + Accepts either the default root complex (pcie.0) or a + pxb-pcie based root complex. + ERST =20 DEF("name", HAS_ARG, QEMU_OPTION_name, --=20 2.43.0