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([71.212.157.132]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2651d2df15esm73459905ad.45.2025.09.16.07.22.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Sep 2025 07:22:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1758032566; x=1758637366; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nq6JrE67XdC4DhChEEdPGkYsROtQVb32kfX4xjifCBA=; b=R9lORuQOv40l6EUd8zc6xBftuPAirF0TCA/hvn6RZIUMqodP5Npxc/o03Fkxvs55tY 1BCuTKacJ/oxUOonkK3t82LAUJp8HIwzOsxiUif+FcdMriH8QdxdXjt8KHPyLodEOSuI cBj2wxJj4KTngmyo5V7onm3+V5JYDGn9wK5aEtofyOtj3txdu+d0uYjLLil4uGKO+/Ps IWtAF5tp+1/q4avV6f2Inub88QDxTd9bdgJaR0Tkcbu7XoV79lSFL/i29Jq+DZE1sg/G SGz/v/eZNaB7FTs8Y8YLoJtkD6D9Bn8BnIBOxLPJNpO516CeF6GVzS9sKVfm3sKFqz9q LyBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758032566; x=1758637366; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nq6JrE67XdC4DhChEEdPGkYsROtQVb32kfX4xjifCBA=; b=mRmzI1ZIfg123n7PqcICY7xi9smDYpdaAhyWUhmIW4sQpzAHZqRvh8xx9JLvhNY+En o+LeKZOF/QPMgHpaqrpZZvB2frWLgAFUBdXZQqFqOl9BAGkqm7AR4xRAZFfSQ3wggcRy 6BVpf967IWWPj3LszACdFnWSDAuRaFVDNWK2TIVsF94goXdzsg0Qv2DFpomMXREzIhV1 vLlobXoOF/PM99AbejKvGEC2X9G4xx++sM+IoYiWw2uoVg1lMjOyQf8wurnso4t0Qoaa i82sZgkwMsWkH5xDh1put8vFrB8DlsuywetzBZrjgpqUHt4KO7jbz9XSXgq/OP9qj0bu hhsg== X-Gm-Message-State: AOJu0Yz1JfNmq5VucIMkiZhfdB6p8RLlAwh/lXlbzpDieT+pd2zK1Hih FdTmynEeohpWIm9g2gCtahGZ1oEBfCJ2jWE50vCC6Q2RK9prDqRowD2+p1o4iYGqqgQUxY+EZ5y BPG0y X-Gm-Gg: ASbGncvq9/l0p3Zbx6q+/f69ZJ5beIooSPXdnfHiz4Vj50A3yAj5NbM+tL53Lo2DqR6 AdBjWgSiTI8jAZ6VN2VX5v4LTy6qxd0uZe5vlsxSXRbl3wi5u5xOZkPndmJAnXSW/hiH3xv/wn2 2Kt3ah4kLhC7sfFAQODaWAVP6PY1/XaCpnKL2XCN3Eb5+cNYAfGujqeSFWWXlWU7D5bAt88ALYB U2OS2IRKy6qdN74RBuwdNuck/ah9Gffosg4wwiCw4ftpks8JF3IMZ6+jXnQezqBxRwdhE67QgEm fvLpUi2UmrQsfKqE7rDuaFnIo2LG+oimtirwNuhCbSdQ2xcwjbf9NeL/q5rbBk6JQXOfxp8K7O8 paRuExS9aNLRSuHtxg77jn2FGs0b1 X-Google-Smtp-Source: AGHT+IE3hBaJlIif+4VDQfMuDeMPJZ+Faz7nCisIxhK7cfCDDoX2f6okBKa/CgqFI0MdnVff+fVung== X-Received: by 2002:a17:902:da4f:b0:264:416:8cad with SMTP id d9443c01a7336-26404169009mr137311855ad.38.1758032565952; Tue, 16 Sep 2025 07:22:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org Subject: [PATCH v2 07/36] target/arm/hvf: Replace hvf_sreg_match with hvf_sreg_list Date: Tue, 16 Sep 2025 07:22:08 -0700 Message-ID: <20250916142238.664316-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250916142238.664316-1-richard.henderson@linaro.org> References: <20250916142238.664316-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1758032771370116600 Content-Type: text/plain; charset="utf-8" Change hvf_get_registers and hvf_put_registers to iterate over cpregs_indexes instead of hvf_sreg_match. This lets us drop the cp_idx member of hvf_sreg_match, which leaves only one member in the struct. Replace the struct with a const array. Instead of int, use the proper enum type: hv_sys_reg_t. Rename from hvf_sreg_match to hvf_sreg_list because there is no longer any matching going on. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/hvf/hvf.c | 45 +++++++++++++++----------------------------- 1 file changed, 15 insertions(+), 30 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 98f49ce33a..b043eac8c6 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -394,11 +394,6 @@ static const struct hvf_reg_match hvf_fpreg_match[] = =3D { { HV_SIMD_FP_REG_Q31, offsetof(CPUARMState, vfp.zregs[31]) }, }; =20 -struct hvf_sreg_match { - int reg; - uint32_t cp_idx; -}; - /* * QEMU uses KVM system register ids in the migration format. * Conveniently, HVF uses the same encoding of the op* and cr* parameters @@ -419,9 +414,9 @@ struct hvf_sreg_match { =20 #undef DEF_SYSREG =20 -#define DEF_SYSREG(HVF_ID, op0, op1, crn, crm, op2) { HVF_ID }, +#define DEF_SYSREG(HVF_ID, op0, op1, crn, crm, op2) HVF_ID, =20 -static struct hvf_sreg_match hvf_sreg_match[] =3D { +static const hv_sys_reg_t hvf_sreg_list[] =3D { #include "sysreg.c.inc" }; =20 @@ -434,7 +429,7 @@ int hvf_get_registers(CPUState *cpu) hv_return_t ret; uint64_t val; hv_simd_fp_uchar16_t fpval; - int i; + int i, n; =20 for (i =3D 0; i < ARRAY_SIZE(hvf_reg_match); i++) { ret =3D hv_vcpu_get_reg(cpu->accel->fd, hvf_reg_match[i].reg, &val= ); @@ -463,13 +458,9 @@ int hvf_get_registers(CPUState *cpu) assert_hvf_ok(ret); pstate_write(env, val); =20 - for (i =3D 0; i < ARRAY_SIZE(hvf_sreg_match); i++) { - int hvf_id =3D hvf_sreg_match[i].reg; - uint64_t kvm_id =3D HVF_TO_KVMID(hvf_id); - - if (hvf_sreg_match[i].cp_idx =3D=3D -1) { - continue; - } + for (i =3D 0, n =3D arm_cpu->cpreg_array_len; i < n; i++) { + uint64_t kvm_id =3D arm_cpu->cpreg_indexes[i]; + int hvf_id =3D KVMID_TO_HVF(kvm_id); =20 if (cpu->accel->guest_debug_enabled) { /* Handle debug registers */ @@ -553,7 +544,7 @@ int hvf_get_registers(CPUState *cpu) =20 val =3D read_raw_cp_reg(env, ri); =20 - arm_cpu->cpreg_values[hvf_sreg_match[i].cp_idx] =3D val; + arm_cpu->cpreg_values[i] =3D val; continue; } } @@ -562,7 +553,7 @@ int hvf_get_registers(CPUState *cpu) ret =3D hv_vcpu_get_sys_reg(cpu->accel->fd, hvf_id, &val); assert_hvf_ok(ret); =20 - arm_cpu->cpreg_values[hvf_sreg_match[i].cp_idx] =3D val; + arm_cpu->cpreg_values[i] =3D val; } assert(write_list_to_cpustate(arm_cpu)); =20 @@ -578,7 +569,7 @@ int hvf_put_registers(CPUState *cpu) hv_return_t ret; uint64_t val; hv_simd_fp_uchar16_t fpval; - int i; + int i, n; =20 for (i =3D 0; i < ARRAY_SIZE(hvf_reg_match); i++) { val =3D *(uint64_t *)((void *)env + hvf_reg_match[i].offset); @@ -605,12 +596,9 @@ int hvf_put_registers(CPUState *cpu) aarch64_save_sp(env, arm_current_el(env)); =20 assert(write_cpustate_to_list(arm_cpu, false)); - for (i =3D 0; i < ARRAY_SIZE(hvf_sreg_match); i++) { - int hvf_id =3D hvf_sreg_match[i].reg; - - if (hvf_sreg_match[i].cp_idx =3D=3D -1) { - continue; - } + for (i =3D 0, n =3D arm_cpu->cpreg_array_len; i < n; i++) { + uint64_t kvm_id =3D arm_cpu->cpreg_indexes[i]; + int hvf_id =3D KVMID_TO_HVF(kvm_id); =20 if (cpu->accel->guest_debug_enabled) { /* Handle debug registers */ @@ -688,7 +676,7 @@ int hvf_put_registers(CPUState *cpu) } } =20 - val =3D arm_cpu->cpreg_values[hvf_sreg_match[i].cp_idx]; + val =3D arm_cpu->cpreg_values[i]; ret =3D hv_vcpu_set_sys_reg(cpu->accel->fd, hvf_id, val); assert_hvf_ok(ret); } @@ -899,7 +887,7 @@ int hvf_arch_init_vcpu(CPUState *cpu) { ARMCPU *arm_cpu =3D ARM_CPU(cpu); CPUARMState *env =3D &arm_cpu->env; - uint32_t sregs_match_len =3D ARRAY_SIZE(hvf_sreg_match); + uint32_t sregs_match_len =3D ARRAY_SIZE(hvf_sreg_list); uint32_t sregs_cnt =3D 0; uint64_t pfr; hv_return_t ret; @@ -924,17 +912,14 @@ int hvf_arch_init_vcpu(CPUState *cpu) =20 /* Populate cp list for all known sysregs */ for (i =3D 0; i < sregs_match_len; i++) { - int hvf_id =3D hvf_sreg_match[i].reg; + hv_sys_reg_t hvf_id =3D hvf_sreg_list[i]; uint64_t kvm_id =3D HVF_TO_KVMID(hvf_id); uint32_t key =3D kvm_to_cpreg_id(kvm_id); const ARMCPRegInfo *ri =3D get_arm_cp_reginfo(arm_cpu->cp_regs, ke= y); =20 if (ri) { assert(!(ri->type & ARM_CP_NO_RAW)); - hvf_sreg_match[i].cp_idx =3D sregs_cnt; arm_cpu->cpreg_indexes[sregs_cnt++] =3D kvm_id; - } else { - hvf_sreg_match[i].cp_idx =3D -1; } } arm_cpu->cpreg_array_len =3D sregs_cnt; --=20 2.43.0