From nobody Tue Feb 10 17:14:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1758026787206807.9464616021362; Tue, 16 Sep 2025 05:46:27 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uyV3l-0003IK-DX; Tue, 16 Sep 2025 08:45:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uyV3N-0003Db-RZ for qemu-devel@nongnu.org; Tue, 16 Sep 2025 08:45:03 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uyV3H-0002J5-1N for qemu-devel@nongnu.org; Tue, 16 Sep 2025 08:45:00 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8BxmdG8W8loufMKAA--.23813S3; Tue, 16 Sep 2025 20:44:44 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowJDxbMG4W8loS1uZAA--.42126S5; Tue, 16 Sep 2025 20:44:44 +0800 (CST) From: Song Gao To: maobibo@loongson.cn Cc: qemu-devel@nongnu.org, philmd@linaro.org, jiaxun.yang@flygoat.com Subject: [PATCH v8 03/11] hw/loongarch: add misc register support dmsi Date: Tue, 16 Sep 2025 20:21:01 +0800 Message-Id: <20250916122109.749813-4-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20250916122109.749813-1-gaosong@loongson.cn> References: <20250916122109.749813-1-gaosong@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJDxbMG4W8loS1uZAA--.42126S5 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1758026790748116600 Content-Type: text/plain; charset="utf-8" Add feature register and misc register for dmsi feature checking and setting Signed-off-by: Song Gao Reviewed-by: Bibo Mao --- hw/loongarch/virt.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 2f64089eac..cc23e98b3a 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -564,6 +564,10 @@ static MemTxResult virt_iocsr_misc_write(void *opaque,= hwaddr addr, return MEMTX_OK; } =20 + if (virt_has_dmsi(lvms) && val & BIT(IOCSRM_DMSI_EN)) { + lvms->misc_status |=3D BIT(IOCSRM_DMSI_EN); + } + features =3D address_space_ldl(&lvms->as_iocsr, EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, attrs, NULL); @@ -599,6 +603,9 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, h= waddr addr, break; case FEATURE_REG: ret =3D BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI); + if (virt_has_dmsi(lvms)) { + ret |=3D BIT(IOCSRF_DMSI); + } if (kvm_enabled()) { ret |=3D BIT(IOCSRF_VM); } @@ -628,6 +635,10 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, = hwaddr addr, if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { ret |=3D BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); } + if (virt_has_dmsi(lvms) && + (lvms->misc_status & BIT(IOCSRM_DMSI_EN))) { + ret |=3D BIT_ULL(IOCSRM_DMSI_EN); + } break; default: g_assert_not_reached(); --=20 2.41.0