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(unknown [192.168.100.1]) by localhost.localdomain (Coremail) with SMTP id AQAAfwCXENBN4MNofEEtAA--.43821S3; Fri, 12 Sep 2025 16:57:01 +0800 (CST) From: Xie Bo To: qemu-devel@nongnu.org Cc: ajones@ventanamicro.com, qemu-riscv@nongnu.org, mjt@tls.msk.ru, pbonzini@redhat.com, anup@brainfault.org, alistair.francis@wdc.com, rkrcmar@ventanamicro.com, palmer@dabbelt.com, xiamy@ultrarisc.com, Xie Bo Subject: [PATCH v8 for v10.0.0 1/2] Set KVM initial privilege mode and mp_state Date: Fri, 12 Sep 2025 16:55:32 +0800 Message-ID: <20250912085535.1649347-2-xb@ultrarisc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250912085535.1649347-1-xb@ultrarisc.com> References: <20250912085535.1649347-1-xb@ultrarisc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAfwCXENBN4MNofEEtAA--.43821S3 X-Coremail-Antispam: 1UD129KBjvJXoWxAF4UJr15AFy3ZF45Xw4rGrg_yoW5XF4xpF 4kCw4akrWkAa97Jw4fJryvgr1ruw4kGrWUC397ZrWxZFsxArWYgF1ktFyUCFyDWFW5Arya 9a90vr1rAa1UZ3JanT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUml14x267AKxVW5JVWrJwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_Jr4l82xGYIkIc2 x26xkF7I0E14v26r4j6ryUM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1l84 ACjcxK6I8E87Iv67AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gr1j6F4UJwAS 0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2 IY67AKxVWUGVWUXwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0 Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02628vn2kIc2 xKxwCY1x0262kKe7AKxVWUtVW8ZwCY02Avz4vE-syl42xK82IYc2Ij64vIr41l4I8I3I0E 4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGV WUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_ Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0rV WUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r4j6r4U JbIYCTnIWIevJa73UjIFyTuYvjfUnZXrUUUUU X-CM-SenderInfo: l0e63zxwud2x1vfou0bp/1tbiAQADB2jDefAANwAAsQ X-Host-Lookup-Failed: Reverse DNS lookup failed for 218.76.62.146 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=218.76.62.146; envelope-from=xb@ultrarisc.com; helo=ultrarisc.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, RDNS_NONE=0.793, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1757667477629116600 Content-Type: text/plain; charset="utf-8" For KVM mode, the privilege mode should not include M-mode, and the=20 initial value should be set to S-mode. Additionally, a following patch=20 adds the implementation of putting the vCPU privilege mode to KVM.=20 When the vCPU runs for the first time, QEMU will first put the privilege=20 state to KVM. If the initial value is set to M-mode, KVM will encounter=20 an error. In addition, this patch introduces the 'mp_state' field to RISC-V=20 vCPUs, following the convention used by KVM on x86. The 'mp_state'=20 reflects the multiprocessor state of a vCPU, and is used to control=20 whether the vCPU is runnable by KVM. Randomly select one CPU as the=20 boot CPU. Since each CPU executes the riscv_cpu_reset_hold() function=20 and CPU0 executes first, only CPU0 randomly selects the boot CPU. Reviewed-by: Andrew Jones Signed-off-by: Xie Bo --- target/riscv/cpu.c | 17 ++++++++++++++++- target/riscv/cpu.h | 2 ++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 09ded6829a..f6c787ebdc 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -38,6 +38,7 @@ #include "kvm/kvm_riscv.h" #include "tcg/tcg-cpu.h" #include "tcg/tcg.h" +#include "hw/boards.h" =20 /* RISC-V CPU definitions */ static const char riscv_single_letter_exts[] =3D "IEMAFDQCBPVH"; @@ -1031,18 +1032,32 @@ static void riscv_cpu_reset_hold(Object *obj, Reset= Type type) #ifndef CONFIG_USER_ONLY uint8_t iprio; int i, irq, rdzero; + static int boot_cpu_index; #endif CPUState *cs =3D CPU(obj); RISCVCPU *cpu =3D RISCV_CPU(cs); RISCVCPUClass *mcc =3D RISCV_CPU_GET_CLASS(obj); CPURISCVState *env =3D &cpu->env; + MachineState *ms =3D MACHINE(qdev_get_machine()); =20 if (mcc->parent_phases.hold) { mcc->parent_phases.hold(obj, type); } #ifndef CONFIG_USER_ONLY env->misa_mxl =3D mcc->misa_mxl_max; - env->priv =3D PRV_M; + if (kvm_enabled()) { + env->priv =3D PRV_S; + } else { + env->priv =3D PRV_M; + } + if (cs->cpu_index =3D=3D 0) { + boot_cpu_index =3D g_random_int_range(0, ms->smp.cpus); + } + if (cs->cpu_index =3D=3D boot_cpu_index) { + env->mp_state =3D KVM_MP_STATE_RUNNABLE; + } else { + env->mp_state =3D KVM_MP_STATE_STOPPED; + } env->mstatus &=3D ~(MSTATUS_MIE | MSTATUS_MPRV); if (env->misa_mxl > MXL_RV32) { /* diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 51e49e03de..4b1c5bf0e4 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -256,6 +256,8 @@ struct CPUArchState { #endif =20 target_ulong priv; + /* Current multiprocessor state of this vCPU. */ + uint32_t mp_state; /* CSRs for execution environment configuration */ uint64_t menvcfg; target_ulong senvcfg; --=20 2.43.0