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Thu, 11 Sep 2025 17:56:19 +0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1757584579; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To; bh=1gqd1TzCEIyvFYfjyBctacJ1+0G9407EGdXdIQ5mOdw=; b=GZEBXztvhdIwrDy+Q0iadCMAlFff6Ubh4Rq2mkiRDA+BbJRsRcyMO9F7HW4sOq0ulDTR5rHxR1+YyxmoLiZ7lwvZ+rRpmOy9rWZJHclutNGf+jQ0S0/OSEAj+nseLi3BzmudRM/EildDfenELDKTbTSubH14C2PN1tvDTR54ypI= From: TANG Tiancheng Date: Thu, 11 Sep 2025 17:56:16 +0800 Subject: [PATCH v3 4/4] target/riscv: Save stimer and vstimer in CPU vmstate MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250911-timers-v3-4-60508f640050@linux.alibaba.com> References: <20250911-timers-v3-0-60508f640050@linux.alibaba.com> In-Reply-To: <20250911-timers-v3-0-60508f640050@linux.alibaba.com> To: qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , qemu-riscv@nongnu.org, Peter Xu , Fabiano Rosas , TANG Tiancheng X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Without migrating these QEMUTimer fields, active S/VS-mode timer events are lost after snapshot or migration. Add VMSTATE_TIMER_PTR() entries to save and restore them. Reviewed-by: LIU Zhiwei Reviewed-by: Daniel Henrique Barboza Signed-off-by: TANG Tiancheng Reviewed-by: Alistair Francis --- target/riscv/machine.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 1600ec44f0b755fdd49fc0df47c2288c9940afe0..51e0567ed30cbab5e791ea90416= 5bc1854709192 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -400,6 +400,30 @@ static const VMStateDescription vmstate_ssp =3D { } }; =20 +static bool sstc_timer_needed(void *opaque) +{ + RISCVCPU *cpu =3D opaque; + CPURISCVState *env =3D &cpu->env; + + if (!cpu->cfg.ext_sstc) { + return false; + } + + return env->stimer !=3D NULL || env->vstimer !=3D NULL; +} + +static const VMStateDescription vmstate_sstc =3D { + .name =3D "cpu/timer", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D sstc_timer_needed, + .fields =3D (const VMStateField[]) { + VMSTATE_TIMER_PTR(env.stimer, RISCVCPU), + VMSTATE_TIMER_PTR(env.vstimer, RISCVCPU), + VMSTATE_END_OF_LIST() + } +}; + const VMStateDescription vmstate_riscv_cpu =3D { .name =3D "cpu", .version_id =3D 10, @@ -476,6 +500,7 @@ const VMStateDescription vmstate_riscv_cpu =3D { &vmstate_elp, &vmstate_ssp, &vmstate_ctr, + &vmstate_sstc, NULL } }; --=20 2.43.0