From nobody Sat Sep 6 17:21:09 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1756889666661896.86074747722; Wed, 3 Sep 2025 01:54:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1utjFm-0002gE-S2; Wed, 03 Sep 2025 04:54:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1utjFT-0002bD-Aq for qemu-devel@nongnu.org; Wed, 03 Sep 2025 04:53:49 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1utjFR-00086q-EQ for qemu-devel@nongnu.org; Wed, 03 Sep 2025 04:53:47 -0400 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxN9ETArho9icGAA--.12913S3; Wed, 03 Sep 2025 16:53:39 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJBxzsESArhoB+B6AA--.32715S2; Wed, 03 Sep 2025 16:53:39 +0800 (CST) From: Bibo Mao To: Song Gao , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v3 11/12] target/loongarch: Only flush one TLB entry in helper_invtlb_page_asid_or_g() Date: Wed, 3 Sep 2025 16:53:38 +0800 Message-Id: <20250903085338.3086081-1-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250903084827.3085911-1-maobibo@loongson.cn> References: <20250903084827.3085911-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJBxzsESArhoB+B6AA--.32715S2 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1756889668853116600 Content-Type: text/plain; charset="utf-8" With function helper_invtlb_page_asid_or_g(), only one TLB entry in LoongArch emulated TLB is invalidated. so with QEMU TLB, it is not necessary to flush all QEMU TLB, only flush address range specified LoongArch emulated TLB is ok. Here invalidate_tlb_entry() is called so that only QEMU TLB entry with specified address range is flushed. Signed-off-by: Bibo Mao Reviewed-by: Richard Henderson --- target/loongarch/tcg/tlb_helper.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_h= elper.c index ee40684a18..017c0d2f5b 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -560,7 +560,6 @@ void helper_invtlb_page_asid_or_g(CPULoongArchState *en= v, target_ulong info, target_ulong addr) { int index, asid =3D info & 0x3ff; - LoongArchTLB *tlb; tlb_match func; bool ret; =20 @@ -570,9 +569,7 @@ void helper_invtlb_page_asid_or_g(CPULoongArchState *en= v, return; } =20 - tlb =3D &env->tlb[index]; - tlb->tlb_misc =3D FIELD_DP64(tlb->tlb_misc, TLB_MISC, E, 0); - tlb_flush(env_cpu(env)); + invalidate_tlb(env, index); } =20 bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size, --=20 2.39.3